Found 903 jobs on 91 pages

25 Oct
Mixed Signal Modeling/Verification Engineer
Location: Austin, TX
Salary: N/A

-leading SoCs. Description Description Development of RNM RF/Analog models in System Verilog. Develop models with self... concepts/topologies. Familiarity with basic logic building blocks and HDL language like verilog. BSEE required. Key...

24 Oct
Digital Circuit Design Intern
Location: Newport Beach, CA
Salary: N/A

to learn and adapt to new concepts Additional Desirable Skills: Having experiences with Verilog RTL coding design. EEO...

24 Oct
RFIC Design Engineer
Location: Cedar Rapids, IA
Salary: $126500 - 241700 per year

Preferred Skills PA design using GaAS HBT/HEMT Verilog-A modeling Python programming The typical base pay...

24 Oct
Specialist, Software Engineering
Location: Goleta, CA
Salary: $90000 - 158000 per year

++, C#, VB, Verilog, Java, Structured Text / PLC Strong analytic and communication skills. Requires the...

24 Oct
Digital Engineer
Location: Mountain View, CA
Salary: $71940 - 96140 per year

development in Verilog using FPGAs from Xilinx, Intel, or Microchip · Knowledge of SPI, I2C, RS-232, and Ethernet protocols...

24 Oct
Eng Prin - Elec
Location: Westminster, CO
Salary: N/A

electronic circuit design and electronic systems background. Expertise in VHDL/Verilog and System Verilog. Experience with FPGA...

24 Oct
Sr Architect - ASIC
Location: Waukesha, WI
Salary: $126480 - 189720 per year

design Familiarity with System Verilog and VHDL code to understand FPGA-based designs; familiar with transitioning FPGA... Verilog/VHDL) design and simulation tools (QuestaSim, Xcelium, etc) Demonstrated experience in MATLAB or equivalent...

24 Oct
ASIC Engineering Technical Leader
Location: San Jose, CA
Salary: N/A

on experience with System Verilog constraints, structures and classes. Prior experience with cross-functional teams Preferred...

24 Oct
RFIC Design Engineer
Location: Cedar Rapids, IA
Salary: $126500 - 241700 per year

Preferred Skills PA design using GaAS HBT/HEMT Verilog-A modeling Python programming The typical base pay...

23 Oct
HPC Processor Digital Architect
Location: Linthicum, MD
Salary: N/A

with a Bachelor's 3 years with a Masters and 0 years with a PhD). Must be familiar with VHDL, Verilog, or SystemVerilog... years of relevant experience (6 years with a Masters or 3 years with a PhD). Must be familiar with VHDL, Verilog...