Found 903 jobs on 91 pages

19 Oct
Eng Prin - Elec
Location: Nashua, NH
Salary: N/A

in FPGA (preferred) or ASIC Design / Development VHDL (preferred) or Verilog HDL coding Familiarity with Xilinx Vivado...

19 Oct
Design Verification Engineer
Location: Cupertino, CA
Salary: $121900 - 183600 per year

& philosophy * Knowledge of Verilog/System Verilog, digital simulation and debug * Knowledge of computer architecture and digital...

19 Oct

C / C++ and Verilog programming skills Experience with RISC-V based processor design and customization Experience...

19 Oct

. What you will bring: Hands on experience in ASIC IP/ASIC SoC design, RTL, Verilog, UVM, and System Verilog. Exposure to front-end tools... including Verilog simulators, RTL/Verification linters, clock domain crossing checkers. Familiarity with synthesis, static...

18 Oct
Mixed-Signal IP Firmware Engineer
Location: Cary, NC
Salary: N/A

knowledge of RTL design. Deep knowledge of Verilog and SystemVerilog. Experience with version control tools (git, Perforce...

18 Oct
Timing Design Engineer
Location: San Diego, CA
Salary: N/A

of Basic SoC Architecture and HDL languages like Verilog to collaborate with our logic design team for timing fixes...

18 Oct
Mixed-Signal IP Firmware Engineer
Location: Cupertino, CA
Salary: N/A

knowledge of RTL design. Deep knowledge of Verilog and SystemVerilog. Experience with version control tools (git, Perforce...

18 Oct
FPGA Engineer
Location: San Diego, CA
Salary: $81250 - 146875 per year

, and implement HDL test benches in hardware description languages, HDL (VHDL, Verilog), for code validation and validation.... Must have proven course-work for FPGA or ASIC designs, Digital design. Perform FPGA designs using VHDL/Verilog/SystemVerilog...

18 Oct
RTL Design Engineer
Location: Austin, TX
Salary: N/A

understanding of mixed signal concepts, along with RTL design fundamentals Deep knowledge of Verilog and System-Verilog Experience... with front-end tools (Verilog simulators, linters, clock-domain crossing checkers) Working knowledge of synthesis, static timing...

18 Oct
Eng Sr Prin - Elec
Location: Manchester, NH
Salary: N/A

experience in FPGA (preferred) or ASIC Design / Development VHDL (preferred) or Verilog HDL coding Familiarity with Xilinx...