Found 903 jobs on 91 pages

30 Oct
ASIC Design Verification Engineer
Location: San Jose, CA
Salary: N/A

years of related experience Experience in System Verilog/UVM. Experience with ASIC design and verification processes...

27 Oct
Principal Digital Design Engineer
Location: Santa Clara, CA
Salary: $140180 - 210000 per year

. Be proficient in coding System Verilog for complex design blocks. Have experience with EDA tools for Synthesis, Lint, CDC...

27 Oct
ASIC Design Engineer - Pixel IP
Location: Cupertino, CA
Salary: N/A

Qualifications Experience in IP/SoC front-end ASIC RTL digital logic design using Verilog and System Verilog. Extensive shown...

27 Oct
Analog IC Design Engineer, Principal
Location: Irvine, CA
Salary: $145800 - 215780 per year

such as Spectre, Spice, Matlab, Hsim, Verilog, etc. Lab testing skills to evaluate the prototype unit to the design specification...

27 Oct
CPU Core Architecture/RTL Design Engineer
Location: Boxborough, MA
Salary: N/A

verification, synthesis, power reduction, timing convergence, and floorplan efforts Preferred Experience: Verilog RTL...

27 Oct
Software Engineer
Location: Hamilton, NJ
Salary: N/A

Required: In-depth programming experience with C++, Python, Matlab, Verilog, Java, JavaScript, and other programming languages...

27 Oct
VLSI Intern
Location: Spring, TX
Salary: $27.5 - 33.25 per hour

will be a plus Knowledge of hardware description language (Verilog or VHDL), electronic design automation (EDA), and/or FPGA tools. Coursework...

26 Oct
GPU Design Verification Engineer
Location: Orlando, FL
Salary: N/A

(Verilog), hardware verification languages (SystemVerilog/UVM), and logic simulators to verify sophisticated GPU RTL designs...

26 Oct
CPU RTL Engineer
Location: Austin, TX
Salary: N/A

, or cache and memory subsystems Knowledge of Verilog or VHDL Experience with simulators and waveform debugging tools...

26 Oct
GPU Design Verification Engineer
Location: Orlando, FL
Salary: N/A

Hardware Verification Engineer, you will be tasked with the following: - Use hardware description languages (Verilog), hardware...