Found 903 jobs on 91 pages

18 Oct
RTL Design Engineer
Location: Austin, TX
Salary: N/A

knowledge of Verilog and System-Verilog Experience with front-end tools (Verilog simulators, linters, clock-domain crossing... checkers) Working knowledge of synthesis, static timing, DFT is a huge plus Some working experience with System-Verilog...

18 Oct
ASIC Engineer, Emulation
Location: Austin, TX - Sunnyvale, CA
Salary: N/A

Engineer, Emulation Responsibilities Develop emulation testbenches in System Verilog and/or C/C++. Deliver emulation...

18 Oct
GPU Performance Analysis Engineer
Location: San Diego, CA
Salary: N/A

Experience with Verilog, C and C++. Experience with scripting in Python. Bachelor's degree and minimum of 3+ years of relevant...

18 Oct
Senior ASIC Verification Engineer
Location: Santa Clara, CA
Salary: N/A

. This includes coding in System Verilog, UVM, C++, Perl, Python and NVIDIA custom compilers and tools. Partnering closely... verification. Strong coding skills in System Verilog, scripting languages (Perl/python) and C++. Ability to collaborate...

18 Oct
Mixed-Signal IP Firmware Engineer
Location: Cary, NC
Salary: N/A

knowledge of RTL design. Deep knowledge of Verilog and SystemVerilog. Experience with version control tools (git, Perforce...

18 Oct
Engineer V, Electronic Design
Location: Cranberry Township, PA
Salary: N/A

for Ethernet, USB, Wireless (WiFi, BLE). Experience designing FPGA interfaces using Verilog. Experience with Bill of Materials...

18 Oct
Timing Design Engineer
Location: San Diego, CA
Salary: N/A

Verification Working Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able with logic design team...

18 Oct
Mixed-Signal IP Firmware Engineer
Location: San Diego, CA
Salary: N/A

knowledge of RTL design. Deep knowledge of Verilog and SystemVerilog. Experience with version control tools (git, Perforce...

18 Oct
Mixed-Signal IP Firmware Engineer
Location: San Diego, CA
Salary: N/A

knowledge of RTL design. Deep knowledge of Verilog and SystemVerilog. Experience with version control tools (git, Perforce...

18 Oct
Mixed-Signal IP Firmware Engineer
Location: San Diego, CA
Salary: $115700 - 174200 per year

of RTL design. Deep knowledge of Verilog and SystemVerilog. Experience with version control tools (git, Perforce...