Found 903 jobs on 91 pages

26 Oct
Graphics Cache Hierarchy Design Verification Engineer
Location: Santa Clara, CA
Salary: N/A

for block verification. - Apply knowledge of hardware description languages (VHDL/Verilog) to verify complex designs. - Work...

26 Oct
GPU Design Engineer - Memory Hierarchy
Location: Santa Clara, CA
Salary: N/A

interconnect network, data compression or GPU pipeline Proficiency in high performance, low power designs Proficiency in Verilog.../System Verilog and HDL Minimum of BS degree and 10+ years of relevant experience Key Qualifications Key Qualifications...

26 Oct
GPU Design Engineer - Memory Hierarchy
Location: Santa Clara, CA
Salary: N/A

network, data compression or GPU pipeline Experience in timing and power optimization Proficiency in Verilog/System Verilog...

26 Oct
Graphics (GPU) RTL Design Engineer
Location: Santa Clara, CA
Salary: N/A

. Minimum Qualifications Minimum Qualifications Experience in GPU, CPU, or SIMD architectures Knowledge of System Verilog HDL Experience...

26 Oct
Senior Staff Physical Design Engineer
Location: Santa Clara, CA
Salary: $121840 - 182500 per year

-oriented programming skills Good understanding of digital logic and computer architecture Knowledge of Verilog/VHDL Good...

26 Oct
Mid-level Cyber Research Engineer
Location: USA
Salary: N/A

workflow Experience in vulnerability analysis for either software or hardware Understanding of VHDL and/or Verilog hardware...

26 Oct
MTS Verification Engineer
Location: San Jose, CA
Salary: N/A

(C/C++, Perl, Tcl, Python, Verilog PLI). Familiarity with industry standards (e.g., I2C/SPI). Experience with low-power...

26 Oct
CPU Core RTL Design Engineer
Location: Austin, TX
Salary: N/A

to silicon debug and product support as needed. PREFERRED EXPERIENCE: Verilog RTL development with industry tools in a CPU...

26 Oct

Array Processing. Proficiency in VHDL (preferred) or Verilog development languages. Experience in implementing complex...

26 Oct
CPU RTL Engineer
Location: Austin, TX
Salary: N/A

, or cache and memory subsystems Knowledge of Verilog or VHDL Experience with simulators and waveform debugging tools...