Found 903 jobs on 91 pages

22 Oct
Senior Clocks Methodology Engineer
Location: Santa Clara, CA
Salary: N/A

. Strong interpersonal and collaboration skills are required. Ways to stand out from the crowd: Prior experience in RTL design (Verilog...

22 Oct
Senior ASIC Design Engineer - Hardware
Location: Santa Clara, CA
Salary: N/A

of relevant work experience. Ability to thrive in a dynamically changing environment. Experience in RTL design (Verilog...

20 Oct
Modeling and Simulation Engineer
Location: Dayton, OH
Salary: $81250 - 146875 per year

. Field Programmable Gate Array (FPGA), VHSIC Hardware Description Language (VHDL), and Verilog experience. Original...

20 Oct

standard industry tools such as SPICE and VERILOG Able to interpret device specifications to produce required functionality...

20 Oct
Principal Electronics Engineer
Location: Torrance, CA
Salary: $150000 - 185000 per year

experience. Deep technical understanding and proficiency in C programming for microcontrollers and/or VHDL/Verilog for firmware...

20 Oct
SMTS, PE RFIC Design Engineer
Location: Irvine, CA
Salary: $126500 - 241700 per year

equipment Preferred Qualifications PA design using GaAS HBT/HEMT Verilog-A modeling Python programming #LI-BW1 The...

20 Oct
Senior Emulation Engineer
Location: San Jose, CA
Salary: N/A

prototypes and Verilog, System Verilog. Prior experience with C/C++ and TCL infrastructure development Prior experience...

20 Oct
SMTS, PE RFIC Design Engineer
Location: Irvine, CA
Salary: $126500 - 241700 per year

equipment Preferred Qualifications PA design using GaAS HBT/HEMT Verilog-A modeling Python programming #LI-BW1 The...

19 Oct
Research Scientist Intern, Backplane Design (PhD)
Location: Sunnyvale, CA
Salary: N/A

and simulate digital and analog designs (e.g.: pixel circuits, etc.) using Verilog and other design tools. Document design...

19 Oct
Modeling and Simulation Engineer
Location: Dayton, OH
Salary: $81250 - 146875 per year

. Field Programmable Gate Array (FPGA), VHSIC Hardware Description Language (VHDL), and Verilog experience. Original...