Found 7 jobs on 1 pages

20 Apr
Principal Design Verification Engineer
Location: Belo Horizonte - MG
Salary: N/A

-on experience and excellent debugging skills in developing System Verilog/UVM based testbenches. Ability to independently verify...-Verilog, UVM, C/C++ Strong digital logic fundamentals and understanding Experience in functional coverage/code coverage...

10 Apr

Knowledge of Cadence digital tools would be a plus. Experience in scripting languages Exposure to RTL (Verilog or VHDL...

29 Mar
Product Validation Engineer II
Location: Belo Horizonte - MG
Salary: N/A

programs and shell scripts (PERL/Python preferred). Expertise in coding and debugging synthesizable designs (RTL) in Verilog...

03 Mar

, escrita e conversação; Conhecimento com desenvolvimento de RTL sintetizável em VHDL e Verilog; Conhecimento em Top-Level...

07 Feb

, and feedback control; Knowledge in hardware description languages for FPGAs (VHDL, Verilog, etc.); Experience with firmware...

07 Feb

, and feedback control; Knowledge in hardware description languages for FPGAs (VHDL, Verilog, etc.); Experience with firmware...

02 Feb
Software Engineer II
Location: Belo Horizonte - MG
Salary: N/A

's degree and/or associate’s degree;. Solid knowledge in Python Used with Linux OS Background w/ Verilog/VHDL Basic...; Nice to have: Verilog/System Verilog/VHDL knowledge; GO language knowledge is a big plus; Agile scrum experience...