Found 827 jobs on 83 pages

01 May
Senior Power Analysis Engineer
Location: Austin, TX
Salary: N/A

and balance trade-offs between power, performance, and area. Familiar with developing RTL using Verilog, System Verilog, or VHDL...

01 May
Microelectronics ASIC Design Engineer
Location: Arlington, VA
Salary: $101400 - 183300 per year

(i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: 8+ years...

01 May
FPGA DSP Firmware Design Engineer
Location: Rancho Santa Fe, CA
Salary: $65000 - 117500 per year

descriptor languages, HDL (VHDL, Verilog), based on customer requirements and/or MATLAB model(s). Collaborate with a multi..., design, and implement HDL test benches in hardware description languages, HDL (VHDL, Verilog), for code validation...

01 May
FPGA DSP Firmware Design Engineer
Location: National City, CA
Salary: $65000 - 117500 per year

descriptor languages, HDL (VHDL, Verilog), based on customer requirements and/or MATLAB model(s). Collaborate with a multi..., design, and implement HDL test benches in hardware description languages, HDL (VHDL, Verilog), for code validation...

01 May
FPGA DSP Firmware Design Engineer
Location: Cardiff By The Sea, CA
Salary: $65000 - 117500 per year

descriptor languages, HDL (VHDL, Verilog), based on customer requirements and/or MATLAB model(s). Collaborate with a multi..., design, and implement HDL test benches in hardware description languages, HDL (VHDL, Verilog), for code validation...

01 May
DMTS | SMTS | MTS DRAM Design Engineer
Location: Allen, TX
Salary: N/A

Verification Using Spice and Verilog, simulate to verify proper circuit operation. Analyze circuits for power consumption, speed... with Hspice and Verilog Understanding of Device Reliability Excellent Problem-Solving and Analytical skills As a world leader...

01 May
Microelectronics ASIC Design Engineer
Location: National City, CA
Salary: $101400 - 183300 per year

(i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: 8+ years...

01 May
FPGA DSP Firmware Design Engineer
Location: Chula Vista, CA
Salary: $65000 - 117500 per year

descriptor languages, HDL (VHDL, Verilog), based on customer requirements and/or MATLAB model(s). Collaborate with a multi..., design, and implement HDL test benches in hardware description languages, HDL (VHDL, Verilog), for code validation...

01 May
Microelectronics ASIC Design Engineer
Location: San Diego, CA
Salary: $101400 - 183300 per year

(i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: 8+ years...

01 May
Microelectronics ASIC Design Engineer
Location: La Jolla, CA
Salary: $101400 - 183300 per year

(i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: 8+ years...