Found 910 jobs on 91 pages

01 Nov
Principal Electrical Engineer Tech
Location: Hunt Valley, MD
Salary: N/A

community. Experience with FPGA design in VHDL or Verilog is a bonus. This position requires that the candidate be a US citizen...

01 Nov
Sr. Electrical Engineer
Location: San Jose, CA
Salary: $130000 - 163000 per year

including C, Verilog , Python,etc. Please note that this position requires regular in-office attendance. The...

01 Nov
ASIC Engineering Technical Leader
Location: San Jose, CA
Salary: N/A

with primary focus on RTL Design. Create micro-architecture specifications and participate in reviews Implement Verilog RTL... Prior experience with Verilog/System Verilog Prior experience with Clock Domain, Reset Domain Crossing issues, and Low...

31 Oct
PLL/Clocking Design Engineer
Location: Cupertino, CA
Salary: N/A

and Modeling: Skilled in developing System Verilog models, and performing behavioral simulations to explore new architectural...

31 Oct
FPGA Design Engineer
Location: San Jose, CA - Tualatin, OR
Salary: N/A

interfaces Experience with Intel/Xilinx FPGA tool flows Proficiency with Verilog HDL Language Familiarity with UVM Methodology...

31 Oct
PLL/Clocking Design Engineer
Location: Austin, TX
Salary: N/A

and Modeling: Skilled in developing System Verilog models, and performing behavioral simulations to explore new architectural...

31 Oct
Principal Design Verification Engineer
Location: Edinburgh - Freer, TX
Salary: N/A

and experience of Verilog and System Verilog Excellent debug and problem-solving skills. Has experience with both IP and SOC level...; Experience in Power aware simulations or Formal Verification is a big plus Experience in Verilog-AMS, analog behavior modelling...

31 Oct
Eng Sr - Elec
Location: San Diego, CA
Salary: N/A

(preferred) or ASIC Design / Development VHDL (preferred) or Verilog HDL coding Experience with digital design tools... and timing closure Experience with clock domain crossing techniques Experience with designer-level test bench (VHDL, Verilog...

31 Oct
FE Design and Timing Analysis Engineer
Location: Sunnyvale, CA
Salary: N/A

. Knowledge of basic SoC Architecture and HDL languages like Verilog / System Verilog to collaborate with our logic design team...

31 Oct
Electronics Engineer
Location: Albuquerque, NM
Salary: N/A

troubleshooting using standard lab equipment. Preferred Qualifications: Expertise in VHDL and/or Verilog for FPGA design...