Found 910 jobs on 91 pages

03 Nov
Automation/Workflow Efficiency Coop (Winter/Spring 2025)
Location: Cedar Rapids, IA
Salary: N/A

and presentation skills Experience with Microsoft Office tools, VScode Python, Linux, circuit design, data analysis, system Verilog...

03 Nov
Fpga Engineer
Location: Kirkland, WA
Salary: N/A

FPGA programming using Verilog. This role involves working on video conversion tasks, including 4K video down converting... programming in Verilog. Perform video conversion tasks, including 4K video down converting or up converting and HDR processing...

03 Nov
FPGA Electrical Engineer
Location: Chicago, IL
Salary: N/A

is a plus. – Excellent knowledge of and proficiency with Verilog and/or VHDL. – Proficiency with a full simulator such as ModelSim... IL Jobs, FPGA Electrical Engineer, FPGA, VHDL, Verilog, ModelSim, ISE Design, Secure IP, IP Cores, Network Protocols, Financial...

03 Nov
Senior ASIC Verification Engineer
Location: Milpitas, CA
Salary: $130000 - 175000 per year

Solid knowledge and strong experience of System Verilog, UVM, and C/C++ Experience with building abstraction layered... with at least one of these: C++, Object Oriented Programming, System Verilog Strong knowledge on basic concepts of VLSI, SoC architecture...

03 Nov
ASIC Engineer Intern, Design
Location: Austin, TX - Sunnyvale, CA
Salary: N/A

, a Bachelor's degree in Electrical Engineering, Computer Engineering or related engineering fields Knowledge of Verilog... or System Verilog or HLS Knowledge of Computer Architecture and Logic Design fundamentals Must obtain work authorization in...

03 Nov
Mixed-Signal Verification Engineer
Location: Sunnyvale, CA
Salary: N/A

using System Verilog. Experience in UVM methodology and HDL (System Verilog, Verilog) for verification...

03 Nov
Advanced FPGA Engineer
Location: Annapolis Junction, MD
Salary: N/A

or experiences: Experience with VHDL/Verilog/SystemVerilog and TCL or similar languages, Zync UltraScale+ MPSoC or similar FPGAs...

03 Nov
Mixed-Signal Verification Engineer
Location: Sunnyvale, CA
Salary: N/A

using System Verilog. Experience in UVM methodology and HDL (System Verilog, Verilog) for verification...

03 Nov
VLSI RTL Design Lead Engineer
Location: Fort Collins, CO
Salary: N/A

System Verilog Creating System Verilog Assertions (SVAs) and using Formal Verification to prove design correctness Reviews... peripherals Clock domain crossing concepts and experience System Verilog Assertions and Assumptions for both synthesis...

03 Nov

of successful Architectural through RTL design experience on high performance digital designs Verilog expertise is required as is a deep... a dynamic, global team. Preferred candidates will possess the following: Knowledge of Verilog/VHDL, scripting, STA, DFT, ECO...