Found 861 jobs on 87 pages

22 Sep
Mixed Signal IC Design Senior Engineer
Location: Goleta, CA
Salary: $85000 - 179000 per year

environments. Modelling experience with System Verilog/Real Modelling/Verilog AMS and coding synthesizable RTL. Experience in...

22 Sep
Sr. FPGA Engineer, Kuiper Government Solutions
Location: Northridge, CA
Salary: $143300 per year

, Communication Engineering, or related field, or equivalent experience - 3+ years of experience with System Verilog RTL coding...

22 Sep
Senior FIPS 140 Security Engineer
Location: Columbia, MD
Salary: $70 - 79 per hour

. DESIRED QUALIFICATIONS: Experience with VHDL and Verilog languages. Experience with debugging (GDB, WinDBG, Visual Studio...

22 Sep
Silicon Design Engineer
Location: Austin, TX
Salary: N/A

skills are required: Position requires experience in the following: 1.Performing hardware verification; 2.Verilog..., Systems Verilog, or VHDL; 3.Graphics IP architecture verification; 4.Functional verification of microprocessors; 5...

22 Sep
MTS Silicon Design Engineer
Location: Santa Clara, CA
Salary: N/A

and test scenarios; Computer, SoC, GPU, or CPU architecture; Verilog, System Verilog, or VHDL; Python, Perl, TCL, C, C...

22 Sep
Digital Design - Summer Intern
Location: Austin, TX
Salary: N/A

production. Responsibilities Digital design specification, design, analysis, and HDL (Verilog/System Verilog) coding...

22 Sep
ASIC Design Verification Engineer
Location: Santa Clara, CA
Salary: $126700 - 190100 per year

, and general computational logic design/verification concepts Experience in Verilog/System Verilog and UVM/OVM Strong debugging..., Analytical and problem-solving skills Experience in developing Monitors, Scoreboards, Sequencers that utilize System Verilog...

22 Sep
Silicon Design Engineer
Location: Austin, TX
Salary: N/A

architecture, GPU architecture, or SOC architecture; Post-Si debug; System Verilog, Verilog, or UVM; and Python, Perl, C, or C...

22 Sep
Sr. Silicon Design Engineer
Location: Santa Clara, CA
Salary: N/A

and maintaining tests for DFX verification at SoC level; Building testbench components; C, C++, or Python; Verilog, System Verilog...

22 Sep
Sr. Product Application Engineer
Location: San Jose, CA
Salary: N/A

following: Verilog and VHDL; ASIC design tools (synthesis, simulation, equivalence); Software debugging (macOS, Linux...