Found 861 jobs on 87 pages

21 Sep

(Virtuoso suite). Understanding of digital design, simulation, and verification (verilog/systemverilog/ncsim/vhdl, vcs...

21 Sep
ASIC SoC Architect
Location: Boise, ID
Salary: N/A

Engineering or related field Strong proficiency in RTL coding (Verilog or VHDL), ASIC design flow, and EDA tools In-depth...

21 Sep
Senior Formal Verification Engineer
Location: San Jose, CA
Salary: N/A

Verilog and UVM methodology expertise Must have 5+ years of experience and BSEE, MSEE preferred #FormalVerification #UVM...

21 Sep
ASIC DFT Engineer
Location: Fort Collins, CO
Salary: $107000 - 171000 per year

. (TetraMax, Fastscan) Experience in Verilog coding, testbench generation & simulation Memory BIST insertion and verification...

21 Sep
ASIC SoC Architect
Location: Salt Lake City, UT
Salary: N/A

Engineering or related field Strong proficiency in RTL coding (Verilog or VHDL), ASIC design flow, and EDA tools In-depth...

21 Sep
Senior Formal Verification Engineer
Location: San Diego, CA
Salary: N/A

Verilog and UVM methodology expertise Must have 5+ years of experience and BSEE, MSEE preferred #FormalVerification #UVM...

21 Sep
FPGA/ASIC Design Specialist
Location: Indianapolis, IN
Salary: $113179 - 183916 per year

description language (e.g. VHDL, Verilog, and/or SystemVerilog) and debug the design via simulation tools Expertise achieving timing...

21 Sep
Digital Engineer I/II
Location: San Diego, CA
Salary: $81000 - 132000 per year

years of related experience coding VHDL/Verilog using Xilinx Vavado or Intel Quartus development software. Two years...

21 Sep
Senior Formal Verification Engineer
Location: Phoenix, AZ
Salary: N/A

Verilog and UVM methodology expertise Must have 5+ years of experience and BSEE, MSEE preferred #FormalVerification #UVM...

21 Sep
Physical Synthesis CAD Engineer
Location: Austin, TX
Salary: N/A

with Synthesizable System Verilog RTL Minimum requirement of BS + 0 years of relevant industry experience Key Qualifications Key...