Found 12 jobs on 2 pages

19 Apr
T982 | Applications Engineer
Location: Santiago, Región Metropolitana
Salary: N/A

- ASIC or FPGA design flows - Programming for embedded systems - Cryptography - Hardware digital design using Verilog... or System Verilog - Familiarity with some of the industry-standard protocols will be a plus (AMBA AXI/AHB/APB, PCIe, HDMI, DDR...

19 Apr
Applications Engineer | [SJ167]
Location: Chile
Salary: N/A

- ASIC or FPGA design flows - Programming for embedded systems - Cryptography - Hardware digital design using Verilog... or System Verilog - Familiarity with some of the industry-standard protocols will be a plus (AMBA AXI/AHB/APB, PCIe, HDMI, DDR...

18 Apr
Test & Validation Engineering, Sr Engineer
Location: Santiago, Región Metropolitana
Salary: N/A

(Verilog, VHDL, etc.) Experience on software development processes. Experience working with worldwide cross-functional teams...

18 Apr
Test & Validation Engineering, Sr Engineer
Location: Santiago, Región Metropolitana
Salary: N/A

(Verilog, VHDL, etc.) Experience on software development processes. Experience working with worldwide cross-functional teams...

18 Apr
Test & Validation Engineering, Sr Engineer
Location: Santiago, Región Metropolitana
Salary: N/A

(Verilog, VHDL, etc.) Experience on software development processes. Experience working with worldwide cross-functional teams...

14 Apr
Ingeniero/a de proyectos e innovación (civil eléctrico/electrónico) - Lo Boza
Location: Santiago, Región Metropolitana
Salary: N/A

. Deseable: MATLAB/SIMULINK, LABVIEW, VERILOG, VHDL. LOS/AS CANDIDATOS/AS DEBEN RESIDIR EN LA RM, O ESTAR DISPUESTOS...

13 Apr
Intern (Technical-Engineering)
Location: Santiago, Región Metropolitana
Salary: N/A

/Electric Engineering final year student. Verilog and System Verilog. Knowledge of hardware/software tools such as VCS...

13 Apr
Applications Engineering, Sr Engineer
Location: Santiago, Región Metropolitana
Salary: N/A

, is proficient with UNIX, RTL(Verilog/VHDL) and has a working knowledge of the ASIC design flow and/or CAD engineering combined...

13 Apr
Applications Engineering, Engineer
Location: Santiago, Región Metropolitana
Salary: N/A

or FPGA design flows Programming for embedded systems Cryptography Hardware digital design using Verilog or System Verilog...

23 Mar
Ingeniero/a de proyectos e innovación (civil eléctrico/electrónico) - Lo Boza
Location: Santiago, Región Metropolitana
Salary: N/A

. Deseable: MATLAB/SIMULINK, LABVIEW, VERILOG, VHDL. LOS/AS CANDIDATOS/AS DEBEN RESIDIR EN LA RM, O ESTAR DISPUESTOS...