Found 797 jobs on 80 pages

23 Sep
Electrical Engineer, Satellite Design (Senior, Principal)
Location: Falls Church, VA
Salary: N/A

and with integrating hardware and software systems is desired. Familiarity with FPGA programming (VHDL or Verilog) and Altera or Xilinx...

23 Sep
Senior Advanced ASIC FPGA Verification Engineer
Location: Scottsdale, AZ
Salary: N/A

or equivalent in a Linux Environment In-depth knowledge of System Verilog object oriented programming and the Universal... on concepts and ideas. Proficient with embedded micro-processing systems, FPGA Design and Verification using System Verilog...

22 Sep
MTS Silicon Design Engineer
Location: Santa Clara, CA
Salary: N/A

and test scenarios; Computer, SoC, GPU, or CPU architecture; Verilog, System Verilog, or VHDL; Python, Perl, TCL, C, C...

22 Sep
Silicon Design Engineer
Location: Boxborough, MA
Salary: N/A

are required: Position requires experience in the following: ASIC Design, RTL Design, or Electronic System Level Design; Verilog, VHDL..., System Verilog, or UVM; C, C++, Python, Ruby, or Shell; GPU architecture, CPU architecture, or SOC architecture...

22 Sep
Sr. Silicon Design Engineer
Location: Austin, TX
Salary: N/A

++, or Python; Verilog or System Verilog; UVM; Writing test code; Functional verification; Testbench creation; and Protocols...

22 Sep
Silicon Design Engineer
Location: Santa Clara, CA
Salary: N/A

Verilog, Verilog, or UVM; and Python, Perl, C, or C++. Employer will accept skills gained in furtherance of graduate-level...

22 Sep
FPGA Engineer
Location: Kirkland, WA
Salary: $60 - 75 per hour

FPGA Engineer Location: Kirkland, WA (Hybrid schedule) Description: Design complex logic in both Verilog and VHDL... to facilitate code reuse. Qualifications: 5 years of FPGA Experience Xilinx Experience Verilog or VHDL Experience...

22 Sep
Sr. Silicon Design Engineer
Location: San Jose, CA
Salary: N/A

are required: Position requires experience in the following: Verilog, System Verilog, or VHDL; Logic or circuit design; SOC or system...

22 Sep
ASIC Design Verification Engineer
Location: Santa Clara, CA
Salary: $126700 - 190100 per year

, and general computational logic design/verification concepts Experience in Verilog/System Verilog and UVM/OVM Strong debugging..., Analytical and problem-solving skills Experience in developing Monitors, Scoreboards, Sequencers that utilize System Verilog...

22 Sep
Silicon Design Engineer
Location: Santa Clara, CA
Salary: N/A

; 3.Verilog, System Verilog, or VHDL; 4.Design flows and methodologies used for chip verification; 5.ASIC design tools...