Found 903 jobs on 91 pages

10 Oct
CPU Processor Performance Verification Engineer
Location: Santa Clara, CA
Salary: N/A

and performance model • Develop C or Verilog-based checkers for verifying the performance features • Develop coverage monitors... skills in assembly, C/C++, Verilog, System Verilog, or scripting Key Qualifications Key Qualifications Preferred...

10 Oct

communications architectural design. Expertise in either VHDL (preferred) or Verilog hardware development languages. Experience... with Electronically steered antennas. Experience with systems in high doppler effects. VHDL (or Verilog) FPGA Synthesis FPGA Place...

10 Oct
ASIC Design Engineer - Pixel IP
Location: Cupertino, CA
Salary: $121900 - 183600 per year

in IP/SoC front-end ASIC RTL digital logic design using Verilog and System Verilog. Industry exposure to and knowledge...

10 Oct
CPU Processor Performance Verification Engineer
Location: Santa Clara, CA
Salary: $121900 - 183600 per year

and performance model • Develop C or Verilog-based checkers for verifying the performance features • Develop coverage monitors... Programming skills in assembly, C/C++, Verilog, System Verilog, or scripting Key Qualifications Key Qualifications Preferred...

10 Oct
CPU Processor Performance Verification Engineer
Location: Santa Clara, CA
Salary: N/A

and performance model • Develop C or Verilog-based checkers for verifying the performance features • Develop coverage monitors... skills in assembly, C/C++, Verilog, System Verilog, or scripting Key Qualifications Key Qualifications Preferred...

10 Oct
Intern - ASIC Architecture
Location: Longmont, CO
Salary: N/A

. Perl, Python, C, Unix shell scripts. Knowledge of HDL languages: e.g. Verilog, System Verilog, VHDL. Excellent written...

10 Oct

Synthesis (HLS) with Vivado, Embedded SW C++ (OOP) and System Verilog Assertions (SVA) Knowledge of high-speed protocols (PCIe.../sequences for End-to-End simulation on UVM framework, with System Verilog Assertions, and also writing/debugging C++ based SW...

09 Oct
Senior/Principal DRAM Design Engineer - TPG
Location: Atlanta, GA
Salary: N/A

) Using Spice and Verilog, simulate to verify proper circuit operation. Analyze circuits for power consumption, speed...

09 Oct
Senior Verification Engineer, SoC
Location: Santa Clara, CA
Salary: N/A

, UVM, System Verilog. Familiarity with verification challenges in large scale designs. Solid understanding of basic...

09 Oct
Senior/Principal DRAM Design Engineer - TPG
Location: Boise, ID
Salary: N/A

simulations using industry-standard tools (e.g., SPICE and VERILOG) Design and develop schematic blocks for memory array...