Found 903 jobs on 91 pages

11 Oct
Design Verification Engineer
Location: San Diego, CA
Salary: $115700 - 174200 per year

Qualifications Preferred Qualifications Knowledge of computer architecture and digital design fundamentals Knowledge of Verilog...

11 Oct
Emulation Engineer
Location: Austin, TX
Salary: N/A

with C/C++, DPI and System Verilog, Verilog, VHDL design. Experience with waveform debug tools, Verdi/SimVision Knowledge...

11 Oct
Design Verification Engineer
Location: Cupertino, CA
Salary: $121900 - 183600 per year

Qualifications Preferred Qualifications Knowledge of computer architecture and digital design fundamentals Knowledge of Verilog...

11 Oct
SoC Machine Learning Design Engineer
Location: Cupertino, CA
Salary: $121900 - 183600 per year

or MLX - Experience with hardware description languages like Verilog, SystemVerilog or VHDL - Strong communication...

11 Oct
Eng Sr Prin - Elec
Location: Nashua, NH
Salary: N/A

VHDL (preferred) or Verilog HDL coding Familiarity with Xilinx Vivado or Intel/Altera Quartus Experience with internal...

11 Oct
Staff Digital Verification Engineer
Location: Linthicum, MD
Salary: N/A

for our development of full-custom digital and mixed signal superconducting processor circuits. Must be proficient in HDL (VHDL/Verilog... (VHDL/Verilog) and HVL (SystemVerilog) Experience with SystemVerilog Assertions (SVA) Knowledge of Universal Verification...

11 Oct

on reset, brown-out detection, and temperature sensors. Mixed signal design experience in Verilog, Verilog-A/AMS, and Genus...

11 Oct
Staff IC Design Engineer
Location: California
Salary: N/A

detection, and temperature sensors. Mixed signal design experience in Verilog, Verilog-A/AMS, and Genus/Innovus. Experience...

10 Oct
Positioning, Navigation and Timing Engineer
Location: Dayton, OH
Salary: $81250 - 146875 per year

Description Language (VHDL), and Verilog experience. Original Posting Date: 2024-10-07 While subject to change based on business needs...

10 Oct
ASIC Design Engineer - Pixel IP
Location: Cupertino, CA
Salary: N/A

in IP/SoC front-end ASIC RTL digital logic design using Verilog and System Verilog. Industry exposure to and knowledge...