Found 910 jobs on 91 pages

18 Oct
FPGA Engineer
Location: Cardiff By The Sea, CA
Salary: $81250 - 146875 per year

, and implement HDL test benches in hardware description languages, HDL (VHDL, Verilog), for code validation and validation.... Must have proven course-work for FPGA or ASIC designs, Digital design. Perform FPGA designs using VHDL/Verilog/SystemVerilog...

18 Oct
Principal Electronics Engineer
Location: Torrance, CA
Salary: $135000 - 185000 per year

our Common Libraries in C for PIC microcontrollers and VHDL or Verilog for FPGA’s. Potential for some ARM based development... technical understanding and proficiency in C programming for microcontrollers and VHDL/Verilog for firmware. Passion...

18 Oct
Eng Sr Prin - Elec
Location: Manchester, NH
Salary: N/A

) or ASIC Design / Development VHDL (preferred) or Verilog HDL coding Familiarity with Xilinx Vivado or Intel/Altera Quartus...

18 Oct
Mixed-Signal IP Firmware Engineer
Location: Cupertino, CA
Salary: N/A

knowledge of RTL design. Deep knowledge of Verilog and SystemVerilog. Experience with version control tools (git, Perforce...

18 Oct
Senior ASIC Verification Engineer
Location: Santa Clara, CA
Salary: N/A

. This includes coding in System Verilog, UVM, C++, Perl, Python and NVIDIA custom compilers and tools. Partnering closely... verification. Strong coding skills in System Verilog, scripting languages (Perl/python) and C++. Ability to collaborate...

18 Oct
Timing Design Engineer
Location: San Diego, CA
Salary: N/A

Verification Working Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able with logic design team...

18 Oct

conversion, and front-end data acquisition Experience in Verilog and FPGA application development and implementations Skilled...

18 Oct
Senior Design Engineer
Location: San Jose, CA
Salary: $99500 - 197500 per year

, verification and development of firmware code for NAND internal operations and full-chip Verilog Verification. Responsibilities... documents for new and legacy features Developing and supporting SVA (System Verilog Assertions) Test Bench to perform sub...

18 Oct
RTL Design Engineer
Location: Austin, TX
Salary: N/A

knowledge of Verilog and System-Verilog Experience with front-end tools (Verilog simulators, linters, clock-domain crossing... checkers) Working knowledge of synthesis, static timing, DFT is a huge plus Some working experience with System-Verilog...

18 Oct
Mixed-Signal IP Firmware Engineer
Location: San Diego, CA
Salary: N/A

knowledge of RTL design. Deep knowledge of Verilog and SystemVerilog. Experience with version control tools (git, Perforce...