Found 94 jobs on 10 pages

14 Apr
ASIC Digital Design, Staff Engineer
Location: Kanata, ON
Salary: N/A

and build verification environments for IP level designs using System Verilog with UVM. Apply advanced verification techniques... techniques Scripting in any language such as Python, Perl Proficient in HDL languages System Verilog, Verilog, or VHDL Good...

14 Apr
ASIC Digital Design, Sr Staff Engineer
Location: Kanata, ON - Nepean, ON
Salary: N/A

verifying designs at the chip level and block level. Strong Verilog and SystemVerilog skills are required as well as in-depth... knowledge of the UVM methodology. Candidates will have knowledge of System Verilog Assertions and/or assertion based...

11 Apr
Analog Design, Sr Staff Engineer
Location: Kanata, ON
Salary: N/A

circuits is a plus Knowledge of SPICE simulators and simulation methods Knowledgeable in Verilog-A for analog behavioral...

10 Apr

description languages like Verilog/VHDL. - Demonstrated ability to work collaboratively in a multidisciplinary team and excellent...

09 Apr
SMTS Design Verification Engineer - SEC IP
Location: Markham, ON
Salary: N/A

: Strong background in ASIC Design Flow Expertise in Design Verification Proficient in Verilog and System Verilog Experience verifying...

09 Apr
RTL Design Engineer
Location: Vancouver, BC
Salary: N/A

synthesis and timing analysis to achieve timing closure Experience in HDL (VHDL/Verilog), HVL (SystemVerilog) and SystemVerilog...

09 Apr
Design Verification Engineer
Location: Vancouver, BC
Salary: N/A

end timing closure(e.g. Formality, CDC & Linting tools, Design Compiler/FX etc) Strong background in Verilog and System... Verilog Strong analytical skills and attention to detail Excellent written and communication skills Understanding of the IP...

09 Apr
Verification Design Engineer
Location: Vancouver, BC
Salary: N/A

& SKILL SETS: Extensive hardware verification experience Must be proficient in Verilog, System Verilog, UVM, and working in... Linux and Windows environments Must have ASIC design knowledge and be able to debug Verilog RTL code using simulation tools...

09 Apr

-verification in UVM System Verilog, C-DPI, and gasket structured testbench. Knowledge and development of monitors and checkers...

09 Apr
SOC DFT Technician(s)
Location: Markham, ON
Salary: N/A

QUALIFICATIONS: Knowledge of Verilog, C/C++ and scripting languages; experience with Perl and TCL is a plus Minimum of 1 year...