Found 910 jobs on 91 pages

05 Nov
ASIC Engineer Intern, Implementation
Location: Sunnyvale, CA
Salary: N/A

Electrical Engineering, Computer Engineering or related engineering fields Knowledge of Verilog, VHDL, or HLS Knowledge...

05 Nov
VLSI RTL Design Lead Engineer
Location: Fort Collins, CO
Salary: N/A

System Verilog Creating System Verilog Assertions (SVAs) and using Formal Verification to prove design correctness Reviews... peripherals Clock domain crossing concepts and experience System Verilog Assertions and Assumptions for both synthesis...

03 Nov
Electrical Engineer (FPGA)
Location: Hilliard, OH
Salary: $44 - 70 per hour

design requirements. Designs and develops digital subsystems. Performs VDHL/Verilog firmware development. Works... or Altera/Intel FPGA development 1+ professional working experience with VHDL or Verilog Programming Logic simulation...

03 Nov
Senior Staff Digital Design (FPGA) Engineer - Rolling Meadows, IL
Location: Rolling Meadows, IL
Salary: $122500 - 155000 per year

Proficiency in hardware description languages (HDLs), such as VHDL or Verilog Deep understanding of the FPGA implementation...

03 Nov
AIS Summer Intern
Location: Austin, TX
Salary: N/A

and data collection Simulation-based digital circuit verification with Verilog and System Verilog Programming ability in C...

03 Nov
Eng II - Elec
Location: Westminster, CO
Salary: N/A

/Verilog and System Verilog. Experience with FPGA design tools including Xilinx Vivado/Vitis and Mentor Modelsim/Questasim...

03 Nov
Engineering Designer
Location: Austin, TX
Salary: N/A

(CONOPS) test system level requirements into FPGA requirements. Design and code in Verilog/VHDL for reliability...

03 Nov
Senior Power Architecture and Optimization Engineer
Location: Santa Clara, CA
Salary: N/A

. Select and run a wide variety of workloads for power analysis. Prototype a new architectural feature in Verilog and analyze.... Strong understanding of concepts of energy consumption, estimation, data movement and low power design. Familiarity with Verilog and ASIC...

03 Nov
Design Verification Engineer (eInfochips Inc)
Location: San Jose, CA
Salary: $150500 - 185000 per year

along-with complex SoC debug is must At-least 10+ years of experience in System Verilog HVL and C/C++. At-least 10+ year of experience...

03 Nov
Design Verification Engineer (eInfochips Inc)
Location: Mountain View, CA
Salary: $150500 - 185000 per year

along-with complex SoC debug is must At-least 10+ years of experience in System Verilog HVL and C/C++. At-least 10+ year of experience...