Found 719 jobs on 72 pages

26 May
FPGA Engineer | Equities Trading | Experienced Hire
Location: Philadelphia, PA - Bala Cynwyd, PA
Salary: N/A

. Experience with VHDL, Verilog, System Verilog or HLS is required. No prior experience in finance or trading is necessary...

26 May
FPGA Design Engineer
Location: Annapolis Junction, MD
Salary: N/A

. Required Skills: Strong FPGA design skills Expertise in VHDL and/or Verilog Experience with Xilinx Vivado and ISE and/or Intel...

25 May
Firmware/FPGA Design Engineer
Location: San Diego, CA
Salary: $65000 - 117500 per year

descriptor languages, HDL (VHDL, Verilog), based on MATLAB model(s). Analyze, design, and implement HDL test benches in hardware... description languages, HDL (VHDL, Verilog), for code validation and validation against models. Analyze schematic diagrams for either custom...

25 May
Firmware/FPGA Design Engineer
Location: Chula Vista, CA
Salary: $65000 - 117500 per year

descriptor languages, HDL (VHDL, Verilog), based on MATLAB model(s). Analyze, design, and implement HDL test benches in hardware... description languages, HDL (VHDL, Verilog), for code validation and validation against models. Analyze schematic diagrams for either custom...

25 May
Electrical Engineer
Location: Huntsville, AL
Salary: $53950 - 97525 per year

with hardware description languages including Verilog or VHDL. Original Posting Date: 2024-04-29 While subject to change based...

25 May
Firmware/FPGA Design Engineer
Location: El Cajon, CA
Salary: $65000 - 117500 per year

descriptor languages, HDL (VHDL, Verilog), based on MATLAB model(s). Analyze, design, and implement HDL test benches in hardware... description languages, HDL (VHDL, Verilog), for code validation and validation against models. Analyze schematic diagrams for either custom...

25 May
Firmware/FPGA Design Engineer
Location: Rancho Santa Fe, CA
Salary: $65000 - 117500 per year

descriptor languages, HDL (VHDL, Verilog), based on MATLAB model(s). Analyze, design, and implement HDL test benches in hardware... description languages, HDL (VHDL, Verilog), for code validation and validation against models. Analyze schematic diagrams for either custom...

25 May
Firmware/FPGA Design Engineer
Location: National City, CA
Salary: $65000 - 117500 per year

descriptor languages, HDL (VHDL, Verilog), based on MATLAB model(s). Analyze, design, and implement HDL test benches in hardware... description languages, HDL (VHDL, Verilog), for code validation and validation against models. Analyze schematic diagrams for either custom...

25 May
Senior Test and Integration Engineer
Location: Linthicum Heights, MD
Salary: N/A

applicable programming languages: Java, Python, C/C++, RISC Assembly, Bash, Tcl/TK, and Verilog. Ten (10+) years of experience...

25 May
Firmware/FPGA Design Engineer
Location: La Jolla, CA
Salary: $65000 - 117500 per year

descriptor languages, HDL (VHDL, Verilog), based on MATLAB model(s). Analyze, design, and implement HDL test benches in hardware... description languages, HDL (VHDL, Verilog), for code validation and validation against models. Analyze schematic diagrams for either custom...