Found 9 jobs on 1 pages

09 May
Gpu Hardware Engineer Lead
Location: San José
Salary: N/A

System Verilog.- Functional bring-up and debug of GPU/Compute pipeline.- Deliver GPU IP to internal customers hardware... technical leadership experience and at least one of following:- Logic Design, Architecture.- System Verilog.- Physical Design...

08 May
Soc Logic Design Engineer
Location: San José
Salary: N/A

+ years' experience in VLSI with good Knowledge in the next areas:System Verilog / OOP, OVM/UVM.- IP or SOC-level design...

08 May
Graphics Dft Student
Location: San José
Salary: N/A

one, or more, of the following areas:- Logic design, validation/verification, or digital electronics- Verilog or System Verilog...

08 May
Soc Design Engineer Student
Location: San José
Salary: N/A

English Level.**Preferred Qualifications,**Knowledge in any of the next areas is a plus:- System Verilog / OOP, OVM/UVM.- IP...

08 May
Testchip Analog Engineer Hvm/Dv
Location: San José
Salary: N/A

experience with hardware description languages such as Verilog and/or System Verilog.- Product engineering or test content...

07 May
Ip Logic Design Engineer
Location: San José
Salary: N/A

) such as System Verilog.- Optimize IP designs for performance, power, and area (PPA) considerations.- Collaborate with verification... Automation) tools and flows.- Proficiency in hardware description languages (System Verilog) and experience with**Inside...

07 May
Testchip Analog Engineer Hvm/Dv
Location: San José
Salary: N/A

.- Strong knowledge in Programing Languages (C++, Python or Verilog)- Intermediate to advanced English Level- Must have permanent...

06 May
Gpu Design Verification Engineer
Location: San José
Salary: N/A

, PERLAdvanced English level**Preferred Qualifications**:Validation microarchitecture using Verilog, System Verilog Experience...

06 May
Undergrad Technical Student
Location: San José
Salary: N/A

following areas:1. Logic design, verification, and architecture. Used Verilog, System Verilog, UVM/OVM through coursework...