Found 3 jobs on 1 pages

28 Apr
Verification Engineer
Location: Kongens Lyngby, Copenhagen
Salary: N/A

environments for industry standards as System Verilog. Ensuring high test coverage numbers on our IPs. Establishment of test... You have experience in System Verilog and have minimum 5 years of experience of using UVM test methodology. Your experience covers...

10 Apr
Senior Digital IC Verification Engineer
Location: Ballerup, Copenhagen
Salary: N/A

· Implementation of System Verilog functional coverage and assertions · Implementing and maintaining the pre-silicon Verification...

17 Feb
Chip Design Verification Engineer
Location: Roskilde, Zealand
Salary: N/A

+ years of proven experience in RTL FrontEnd Asic Design or Verification (Chip Design) Deep knowledge in HDL (Verilog/VHDL...