Found 805 jobs on 81 pages

11 Dec
Security Engineer II, AWS Offensive Security
Location: Seattle, WA
Salary: $136000 per year

, QEMU) - Hardware security (PCB, JTAG, UART, SPI, ROM, microcode, custom ASIC/FPGA) - x86 and/or ARM chipset and firmware...

11 Dec
Advanced ASIC FPGA Engineer
Location: Bloomington, MN
Salary: $66.43 - 71.43 per hour

Check out this new opportunity! Advanced ASIC FPGA Engineer Scottsdale, AZ or Bloomington, MN Contract Position..., verify, and document ASIC (Application Specific Integrated Circuit) and FPGA (Field Programmable Gate Array) developments...

11 Dec
SoC DV Engineering Manager
Location: Waltham, MA
Salary: N/A

. Experience with scripting languages such as Perl, Python, or Tcl to automate verification tasks. Familiarity with FPGA/ASIC...

11 Dec
DFT Engineer
Location: San Jose, CA
Salary: $119000 - 190000 per year

for leading most complex and cutting edge network switching ASIC DFx (Design for Test/debug & manufacturability) from DFT...

11 Dec
Staff Engineer, Physical Design
Location: Santa Clara, CA
Salary: $100840 - 151000 per year

and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data...-micron technology issues like 7nm, 5nm and below. Familiar with ASIC design flow, Verilog HDL, chip synthesis and timing...

11 Dec

security (PCB, JTAG, UART, SPI, ROM, microcode, custom ASIC/FPGA) - x86 and/or ARM chipset and firmware security (TPM, UEFI...

11 Dec
FPGA/ASIC Design Engineer
Location: Indianapolis, IN
Salary: N/A

Talascend is currently seeking an FPGA/ASIC Design Engineer for a contract opportunity located in Indianapolis..., IN. OVERVIEW: In this technical role, you will design, verify, integrate, and test FPGA/ASIC solutions that will be integrated...

11 Dec
Software Dev Engineer - Compiler, Annapurna Labs
Location: Cupertino, CA
Salary: $99500 per year

engineer and ML chip accelerator, ASIC, physical designs, SDE in Test. Because of our teams' breadth of talent, we've been able...

11 Dec
Senior Staff Engineer, Physical Design
Location: Santa Clara, CA
Salary: $121840 - 182500 per year

and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data... and below. Familiar with ASIC design flow, Verilog HDL, synthesis and timing closure. Proven track records of handling chip level P&R...

11 Dec
Hardware Engineer (ASIC), Staff
Location: San Diego, CA
Salary: $126000 - 189000 per year

Job Description: Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group Hardware Engineering General Summary: Qualcomm's Government Technologies (QGOV) division develops special products based on its wi...