Found 755 jobs on 76 pages

19 May
FPGA/ASIC Senior Design Engineer (Onsite)
Location: Tucson, AZ
Salary: $77000 - 163000 per year

A minimum of 5 years of experience to include at least three (3) of the following: FPGA/ASIC design (VHDL and/or Verilog coding...) or FPGA/ASIC verification (SystemVerilog coding) Xilinx or Microsemi devices and flow tools Delivering FPGA/ASIC solutions...

19 May
Engineering Fellow - Systems Security Engineering
Location: Tucson, AZ
Salary: N/A

Application Specific Integrated Circuit (ASIC) development. In-depth experience in design, development and fielding of AT systems...

19 May

situations). Provides personal care (bathing, mouth care, evening care, incontinence care to patient). Applies asic dressings...

19 May
Associate Director Electrical Engineer - FPGA (Onsite)
Location: Cedar Rapids, IA
Salary: N/A

NE , Cedar Rapids, IA, USA Position Role Type: Onsite Become part of the growing Avionics FPGA/ASIC team. This position.... Requirements capture, decomposition, and traceability. ASIC/FPGA digital design and/or verification. RTL coding and simulation in...

19 May
FPGA/ASIC Senior Principal Design Engineer (Onsite)
Location: Tucson, AZ
Salary: N/A

degree A minimum of 10 years of experience to include the following: FPGA/ASIC design (VHDL and/or Verilog coding...) or FPGA/ASIC verification (SystemVerilog coding) Xilinx or Microsemi devices and flow tools Delivering FPGA/ASIC solutions...

19 May
Secure Systems Architect- onsite
Location: McKinney, TX
Salary: N/A

on FPGAs and SOCs Strong experience with MBSE Strong experience with bid and proposal work Experience with ASIC design...

19 May
Software/Firmware Architect- Onsite
Location: McKinney, TX
Salary: N/A

-threading Strong experience with DevSecOps and MBSE Experience with ASIC design Experience with TCP and UDP Ethernet...

19 May
Post-Silicon Validations Engineer
Location: San Diego, CA
Salary: $108000 - 162000 per year

Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation..., integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design...

19 May

to algorithms and architecture. They will design and develop new groundbreaking AMD technologies by participating in new ASIC...

19 May
Lead Static Timing Analysis (STA) Engineer
Location: El Segundo, CA
Salary: $126650 - 171350 per year

with several ASICs/FPGAs signoff and at least one ASIC tape-out Proficiency using Synopsys Primetime (or Cadence Tempus) for timing... closure on ASICs and FPGAs Completed multiple first-pass success ASIC tape-outs Experience using multiple static timing...