Found 57 jobs on 6 pages

17 May

: More than 3 years of mixed signal ASIC evolution experience. Experience in integrating analog and digital designs....btcrecruitment.com today. Please take note that only shortlisted candidates will be notified. #asic #mixedsignal #digital #senior...

16 May
Staff Engineer, Technology Development Quality & Reliability Engineering
Location: Batu Kawan, Pulau Pinang
Salary: N/A

. - Take responsibility for product DPPM, as well as new Technology development programs and new NAND/ASIC development Quality and Reliability...

15 May

. - Take responsibility for product DPPM, as well as new Technology development programs and new NAND/ASIC development Quality and Reliability...

15 May
Senior Engineer, IO/ESD Design Support
Location: Kuching, Sarawak
Salary: N/A

from graduates are welcome, relevant work experience is an advantage. Experience in electronic ASIC design (incl. design, simulation...

14 May
Physical Design Engineer
Location: Malaysia
Salary: N/A

will be related, but not limited to: Participate in the design and implementation of the leading edge, back-end ASIC design flow...

12 May

: More than 3 years of mixed signal ASIC evolution experience. Experience in integrating analog and digital designs... today. Please take note that only shortlisted candidates will be notified. #asic #mixedsignal #digital #senior #engineer #verification...

10 May
Hard-IP Senior Design Engineer
Location: Pulau Pinang
Salary: N/A

power and optimum logic utilization. Qualifications Good understanding in ASIC/FPGA IP or SoC development cycle...

10 May
Hard-IP Design Engineer
Location: Pulau Pinang
Salary: N/A

power and optimum logic utilization. Qualifications Good understanding in ASIC/FPGA IP or SoC development cycle...

10 May
Hard-IP Staff Design Engineer
Location: Pulau Pinang
Salary: N/A

power and optimum logic utilization. Qualifications Good understanding in ASIC/FPGA IP or SoC development cycle...

08 May
MTS Silicon Design Engineer
Location: Pulau Pinang
Salary: N/A

verification quality and product Time to Market for ASIC/SOC design. * The candidate would involve technically in the porting... should have good understanding on ASIC/SOC design and verification flow and should have: Over 5 years of digital IP verification...