Found 13 jobs on 2 pages

31 May
Principal Digital Design Engineer
Location: Nijmegen, Gelderland - Enschede, Overijssel
Salary: €100000 per year

development process and digital design techniques. - Proficient in standard DV languages (Verilog, SystemVerilog, UVM...

31 May
Staff Digital Design Engineer
Location: Nijmegen, Gelderland - Enschede, Overijssel
Salary: €75000 per year

development process and digital design techniques -Proficient in standard DV languages (Verilog, SystemVerilog, UVM) -Excellent...

31 May
Senior Digital Design Engineer
Location: Nijmegen, Gelderland - Enschede, Overijssel
Salary: €70000 per year

standard DV languages (Verilog, SystemVerilog, UVM) - Experience with programming, scripting and automation languages(C/C...

30 May
PhD in Novel Photonic Switched Networks for Next Generation Optical Data Centers
Location: Eindhoven, Noord-Brabant
Salary: €2770 - 3539 per month

and/or for photonic devices and circuits. Solid skills in one or two programming languages e.g. OPNET, OMNET, and VHDL, Verilog HDL FPGA...

30 May
FPGA designer
Location: Veldhoven, Noord-Brabant
Salary: N/A

’s is a must have. Experience with VHDL / RTL Design is a must have. Experience with SystemVerilog/Verilog is highly preferred. Experience... with UVM or System Verilog based verification environments is preferred Broad technical knowledge of digital IPs (Firmware...

19 May

and/or (System)Verilog. Are a critical thinker. Are able to work independently and to communicate in an effective way...

19 May

languages: C(++), VHDL and/or (System)Verilog. Are a critical thinker. Are able to work independently and to communicate in...

05 May
FPGA/RTL Design Engineer
Location: Delft, Zuid-Holland
Salary: N/A

)Verilog Verification frameworks (preferably UVM, but also OVM, OSVVM, Cocotb, etc) Timing closure methods Linux kernel...

04 May
Senior Logic Designer
Location: Vught, Noord-Brabant
Salary: €70000 per year

and/or FPGA logic design flows In depth knowledge of hardware description languages (Verilog, VHDL, SystemVerilog) and scripting...

04 May
PhD In-Memory Computing for efficient online learning Spiking Neural Networks
Location: Eindhoven, Noord-Brabant
Salary: €2770 - 3539 per month

Integrated Circuit (IC) design. Very good skills in HDL (Verilog, VHDL) and scripting languages (Python, TCL). Basic knowledge...