Sr. Staff Engineer (UVM, AMBA, System Verilog & Digital Verification)
Xoriant is an equal opportunity employer. No person shall be excluded from consideration for employment because of race, ethnicity, religion, caste, gender, gender identity, sexual orientation, marital status, national origin, age, disability or veteran status. TITLE:- Sr. Staff Engineer (SystemVerilog & Digital Verification) LOCATION:- SanJose, CA (onsite) This role is part of a large RFC/RFIC/DFT engineering organization, focused on advanced digital verification across complex SoC and mixed-s…
DFT Design Engineer, Machine Learning Acceleration
Custom SoCs (System on Chip) are at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team, you'll be responsible for designing and optimizing hardware in our data centers, including AWS Inferentia and Trainium systems—our custom-designed machine learning inference and training servers. Our success depends on world-class server infrastructure as we handle massive scale and rapidly integrate emerging technologies. We're looking for an ASIC DF…
Analog/Mixed Signal Verilog Modeling Design Engineer
USA-CA Irvine Alton Parkway Bldg 1 USA-CA San Jose Innovation Drive Full time R024672 Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Responsible for developing Digital-Mixed Signal (DMS) models of analog IPs such as touch controller AFEs, wireless power charging, health sensing AFE and satellite AFEs…
Analog/Mixed Signal Verilog Modeling Design Engineer
USA-CA Irvine Alton Parkway Bldg 1 USA-CA San Jose Innovation Drive Full time R024672 Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Responsible for developing Digital-Mixed Signal (DMS) models of analog IPs such as touch controller AFEs, wireless power charging, health sensing AFE and satellite AFEs…
Design Verification Engineer (Einfochips)
Position: Design Verification Engineer (Einfochips) Job Description: Experience: 6 Years Location: San Jose CA Job Description: What candidate will Be Doing: At-least 6 years of experience in System Verilog HVL and C++/C At-least 6 year of experience in UVM. Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component development and integration in test bench, stress/corner testing, failure debug, gate level simulations, assertions, …
Analog/Mixed Signal Verilog Modeling Design Engineer
Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Responsible for developing Digital-Mixed Signal (DMS) models of analog IPs such as touch controller AFEs, wireless power charging, health sensing AFE and satellite AFEs using SystemVerilog language. Interface with analog design team and chip DV team to de…
Senior Digital/Mixed-Signal IC Design Engineer
Job Description Job Description Senior Digital/Mixed-Signal Design Engineer focusing on high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include development and verification of the digital controller for high performance data converters, behavioral modeling, customer support, and to assist with synthesis and place-and-route flow for the digital controller for high performance data converters. Qualifications BS 4 years or equivalent experience in high-pe…
System IP/RTL Design Engineer_Austin, TX (Onsite)_only xoriant W2
Xoriant is an equal opportunity employer. No person shall be excluded from consideration for employment because of race, ethnicity, religion, caste, gender, gender identity, sexual orientation, marital status, national origin, age, disability or veteran status. TITLE :- System IP/RTL Design Engineer LOCATION Austin, TX (Onsite) DURATION 6 Months (May get extend) MODE OF INTERVIEW Onsite RATE $90 per hour on W2 JOB DESCRIPTION Key responsibilities include: Work on RTL design of System IP blocks …
Logic Design Engineer
Job Description Job Description Paragon Energy Solutions Paragon is seeking a Logic Design Engineer to join our Innovation team to support the future development of advanced nuclear reactor control, monitoring and safety systems. Responsibilities: Partner with system design team to research, design and implement I&C solutions Develop and implement I&C systems design hardware and logic Prepare I&C design products such as logic diagrams and system code Prepare I&C design documentation such as req…
Integrated Circuit Design Engineer
Job Description: Senseeker is seeking an integrated circuit (IC) design engineer to join our IC team and perform 65 nm to 180 nm CMOS mixed-signal design for our readout integrated circuits (ROICs). Responsibilities include digital and analog IC design, simulation, layout, and verification; developing behavioral models in Verilog/Verilog-A; contributing novel ideas to the company’s IP portfolio; interfacing with customers; staying current with state-of-the-art technologies; and maintaining clea…
SoC Design & Verification Engineer
Job Title: SoC Design & Verification Engineer Interview: Virtual Job Duration: Long Term Contract Job Location: Austin, TX OR Bay Area, CA Job Description: We are seeking experienced SoC Design & Verification Engineers to develop, integrate, and verify complex System-on-Chip (SoC) designs and IP blocks. The ideal candidate will have strong hands-on experience in RTL design and/or functional verification, with expertise in Verilog/SystemVerilog, UVM, SoC architecture, and industry-standard inter…
Verification Engineer
Job Description: Hands-on experience with VC Formal (Synopsys) and/or Jasper Gold (Cadence) Strong proficiency in System Verilog Assertions (SVA) and formal property specification Experience with formal verification applications: FPV, connectivity checking, register verification, equivalence checking, and coverage analysis Familiarity with scripting languages (TCL, Python, Perl) for flow automation Extensive experience in design verification with a strong focus on formal verification Expertise …
Design For Test (DFT) Engineer
Job Description Onsite San Jose - 5 days a week Description The team is looking for a Design-for-Test contractor to test and validate the next generation Samsung chips. Candidate will be responsible to work with Front End and Physical Design teams to implement DFT and test designs which will impact the product lines for radio frequency (RF) and BlueTooth/Wireless LAN chipsets. JOB RESPONSIBILITIES: Experience with memory BIST - Siemens Tessent Flow Experience with gate-level simulation and simu…
Specialist, Electrical Engineering - FPGA/ ASIC Hardware Engineer
L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers' mission and quest for professional growth. L3Harris provides an inclusive, engaging environment designed to empower employees and promote work-life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do. L3Harris is the Trus…
Lead, Electrical Engineering, FPGA Engineer (FOS)
L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers' mission and quest for professional growth. L3Harris provides an inclusive, engaging environment designed to empower employees and promote work-life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do. L3Harris is the Trus…
FPGA Design Engineer II
Job Description Date Posted: 2026-08-12\n Country: United States of America \n Location: US-AZ-TUCSON-M02 ~ 1151 E Hermans Rd ~ BLDG M02 \n Position Role Type: Onsite \n U.S. Citizen, U.S. Person, or Immigration Status Requirements: Active and transferable U.S. government issued security clearance is required prior to start date. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance \n Security Clearance Type: DoD Clearance: Secret \n Security Clearance Sta…
FPGA Engineer
Job Description The FPGA Engineer works as a member of an engineering team to design, implement, and verify complex FPGA solutions with a focus on video and signal processing applications. This role requires expertise in both FPGA development and digital signal processing techniques. The engineer will be responsible for the full development cycle of FPGA designs from requirements through unit verification and documentation. The engineer will participate in the integration of their FPGA designs …
Electrical Engineer - FPGA/ASIC with Security Clearance
Required Skills: • 5 years of FPGA and/or ASIC design experience; • strong Xilinx/AMD Vivado experience; • Experience with Versal family devices; • Verilog/SystemVerilog HDL proficiency required; • Advanced FPGA implementation skills (synthesis, timing closure, constraints); • Active U.S. security clearance Preferred Skills: • 2 years of FPGA design experience; • strong Xilinx/AMD Vivado experience; • Verilog/SystemVerilog proficiency; • Advanced FPGA implementation skills (synthesis, timing cl…
FPGA Verification Engineer
Job Title: FPGA Verification Engineer Location: Santa Clara, CA-Onsite 100%, Day 1 Mon-Fri Duration: 12 Months Mandatory Areas Must Have Skills FPGA Verification Engineer Skill 1 8 Years of in FPGA Skill 2 5 Years of Exp in UVM Skill 2 5 Years of Exp in System Verlilog Job Description: Strong understanding of FPGA design principles and architectures. Proficiency in System Verilog and UVM verification methodology. Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys V…
Sr. ASIC/FPGA Design Engineer
Job Title : Sr. ASIC/FPGA Design Engineer Work Location: Fully remote Duration: 8 months Terms: W2 Contract Key Skills: FPGA and Application-Specific Integrated Circuit (ASIC) , Verilog, VHDL, SystemVerilog Responsibilities: Design and develop digital ASICs and FPGAs, and/or mixed-signal ASICs Implement designs using HDL (VHDL, Verilog, and/or SystemVerilog). Develop verification methodologies and test benches for block and system-level verification. Create and execute test plans, develop test …