Senior RTL Engineer – CPU
+ years’ experience in RTL design Academic or commercial experience in CPU RTL design Strong RTL design skills using Verilog
FPGA Engineer
design experience Strong RTL development skills using SystemVerilog, Verilog, or VHDL Experience with Xilinx or Intel FPGA
Design Verification Engineer
, models, assertions, and functional tests using Verilog and SystemVerilog Familiarity with constrained-random verification... methodologies, code coverage analysis, and regression testing Good understanding of VHDL and/or Verilog RTL A solid understanding
VHDL FPGA Firmware Engineer
from either Xilinx, Microsemi (Actel) or Lattice and their tools. Advanced verification techniques using either VHDL or System Verilog
Senior FPGA Engineer, £100-140k
that's scaling fast. Position: Senior FPGA Engineer Location: Cambridge Salary: £100-140k Key Skills: FPGA, Verilog or VHDL
Staff Design Verification Engineer
, Verilog-AMS) Proficiency with Cadence tool suite, such as Xcelium/IMC/Virtuoso etc. Verification planning tools (ePlanner
Senior Digital Electronics Engineer / Consultant
, JESD204. ECAD tools (ideally Altium Designer) for PCB layout. C and Python on Linux (ideally embedded programming). Verilog... Design, VHDL / Verilog, DSP, Consultancy, Cambridge Please note: even if you don't have exactly the background indicated
Electronics Engineer – Work from Home
or systems programming experience, ideally C and/or Verilog A methodical, detail-focused approach and the ability to manage
Staff Design Verification Engineer
++ testbenches and working in Linux and Windows environments Experienced with Verilog, System Verilog, C, and C++ CPU pipeline
Hardware Engineer
, ideally up to SIL4. Hands-on experience with modern microcontroller SDKs. Knowledge of FPGA design (VHDL/Verilog) and CPLD
Hardware Engineer
, ideally up to SIL4. Hands-on experience with modern microcontroller SDKs. Knowledge of FPGA design (VHDL/Verilog) and CPLD
Junior FPGA Engineer
following background: Commercial experience with SystemVerilog, Verilog, or VHDL Experience with Xilinx or Intel FPGA
Firmware/ FPGA Engineers - all levels
VHDL Experience in verification techniques using either VHDL or System Verilog / UVM. Experience in specifying timing
Lead Formal Verification Engineer (GPU)
Verilog assertion and abstract model development Expert user of formal verification tools from both academy and EDA vendors
FPGA and Embedded Software Engineer
development experience over multiple projects. Experience in either VHDL or Verilog Experience working with embedded Linux
Lead Software Engineering - C++
, and integrating C++, Verilog, and VHDL solutions in Linux environments. Experience implementing and certifying exchange connectivity
Senior FPGA RTL Engineer
, Verilog or VHDL. Send it to ECM where it will receive close confidential review. We do read every CV, and try to respond
FPGA / Firmware Engineer
will have a solid background in FPGA development using VHDL or Verilog, along with experience in embedded systems and real-time data... across engineering disciplines. The Role: FPGA design and development using VHDL and Verilog Real-time firmware development
Principal Staff Verification Engineer
hands-on experience in block-level/IP-level/SoC-level verification Proficiency in Verilog, SystemVerilog Familiarity
Staff Verification Engineer
as mandatory and Subsystem level as an advantage Expertise in hardware verification languages, particularly System Verilog and UVM