Showing page 5 of 5 (Total listings: 88)

CPU Physical Design Engineer

European Recruitment ✓ Verified
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United Kingdom
Fri, 24 Jul 2026 04:02:17 GMT

We are looking for candidates with experience in one or more areas of CPU, ASIC, or high-performance digital physical design. The ideal candidate

Senior Verification Engineer

IC Resources ✓ Verified
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London
Tue, 21 Jul 2026 22:13:55 GMT

Engineer to take ownership of verification strategy across a range of cutting-edge ASIC developments. This is an opportunity... methodology and design quality What they’re looking for Strong experience developing verification plans for complex ASIC

Senior ASIC Design Engineer

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Hampshire
Tue, 21 Jul 2026 05:23:00 GMT

-performance digital hardware, developing ASIC and FPGA solutions that will be deployed in some of the most demanding environments... RTL micro-architectures Design and implement complex digital logic targeting both ASIC and FPGA platforms Develop

DFT Engineer

IC Resources ✓ Verified
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Cambridgeshire
Tue, 21 Jul 2026 01:59:43 GMT

Join a Growing ASIC Team Developing Next-Generation Silicon – Cambridge I’m currently working with an innovative.... This is an excellent opportunity to join a collaborative ASIC team involved throughout the complete silicon development lifecycle

FPGA Engineer

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Hampshire
Mon, 20 Jul 2026 23:11:30 GMT

on cutting-edge FPGA and ASIC developments, transforming complex communications algorithms into high-performance hardware. You’ll... and/or ASIC designs Knowledge of timing closure, synthesis, and hardware optimisation Experience with FPGA verification

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United Kingdom
Sat, 18 Jul 2026 05:44:25 GMT

semiconductor, SoC architecture or silicon IP background Knowledge of digital design flow, ASIC, RTL, architecture etc. Customer

ASIC Layout Engineer

Universal Quantum ✓ Verified
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Haywards Heath, West Sussex
Tue, 14 Jul 2026 22:48:47 GMT

At Universal Quantum, we aim to make the world a better place by developing a new computer technology. Together, we are creating truly impactful quantum computers. Our machines will be capable of solv

Senior Product Engineer

Ouster ✓ Verified
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Edinburgh
Tue, 14 Jul 2026 02:46:33 GMT

, including probe cards and loadboards. Develop robust ATE-level characterization solutions to validate key ASIC parameters... Collaboration: Engage with both system-level and ASIC-level teams to ensure effective communication and mutual understanding

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