Senior Quantitative Analyst - Trading Risk & Fraud
, ASIC). Track record of mentoring junior analysts. This role suits someone who wants to build something from the ground
Principal Datapath Design Engineer
-on experience in RTL design using VHDL or SystemVerilog. Expertise in ASIC or FPGA design tools and environments. Practical
RF - System Designer
across various engineering domains. Collaborate with RF team members, electronics engineers, ASIC/chip designers, mechanical
RF - System Designer
. Collaborate with RF team members, electronics engineers, ASIC/chip designers, mechanical engineers, software engineers
Senior Staff RF/Analogue IC CAD Engineer - Farnborough, Qualcomm
, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. OR Master...'s degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration
Systems Engineer, Digital Payload
payload evolution. The successful candidate will serve as a senior technical authority across FPGA and ASIC based digital... performance, architecture, requirements, and verification strategy. Lead architecture definition and trade studies for FPGA, ASIC
Staff FPGA Engineer
with JESD204B, ADC/DAC interfaces, DDR3/4, 10Gb Ethernet, digital control algorithms, embedded Linux, or ASIC development
Staff Design Verification Engineer
-level ASIC verification. Strong experience with UVM testbenches and SystemVerilog. Proficient in debugging RTL
CPU Physical Design Engineer
for complex ASIC or CPU/SoC designs Experience across the full implementation flow including floorplanning, place and route, CTS
ASIC Layout Engineer
Job Description: At Universal Quantum, we aim to make the world a better place by developing a new computer technology. Together, we are creating truly impactful quantum computers. Our machines will
Senior Verification Engineer
of complex digital and mixed-signal ASIC designs using advanced verification methodologies. Key responsibilities Develop... and execute comprehensive verification plans for complex mixed-signal ASIC designs Create and maintain UVM-based SystemVerilog
CPU RTL Design Engineer (Senior/Staff) - Cambridge, UK
, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.... OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration
Sr. FPGA Engineer - Vivado
FPGA or ASIC design process and tool flow. Experience in design analysis, experimentation, and methodology. Hands
Technical Marketing Engineer – FPGA Design
in FPGA, ASIC, or SoC design is highly valued. ACADEMIC CREDENTIALS: Bachelor’s Degree in Computer Science, Computer
Principal Engineer
Minimum Qualifications: Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design... and 7+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science
FPGA Engineer
)))]” We are supporting a specialist FPGA and ASIC design consultancy that delivers complex digital hardware solutions for leading technology
GPU Hardware Datapath Design Engineer
. Hands-on experience with ASIC, FPGA, and physical design tools (P&R). Experience with computer assisted proof via industry
Server CPU Physical Design Engineer, Senior/Staff level
in one or more areas of CPU, ASIC, or high-performance digital physical design. The ideal candidate will have: Strong experience..., or a related technical field with relevant experience in ASIC, CPU, or physical design implementation. OR Master's degree
Embedded Software Engineer
, LFP), industrial IoT/cloud-connected systems, FPGA/ASIC design, automotive/aerospace power systems, and wireless
ASIC Project Manager
This ASIC Project Manager role offers the opportunity to lead the development of advanced silicon that powers a wide... range of next-generation technologies. Rather than working on a single product line, you’ll manage multiple ASIC programmes