Senior Systems Verification Engineer - Qualcomm - Sophia or Guyancourt, France
Understanding of Emulation methodology: FPGA, Debug tools, RTL Simulation Additional Skills: Python, Verilog Linux Kernel boot
Senior Systems Design Engineer - Qualcomm - Sophia or Guyancourt - France
development skills: SystemVerilog/Verilog integration and design. RTL Simulation. Debugging Systems understanding: Bus Protocols...-10 years experience Technical Experience: Essential: Verilog/SystemVerilog, Verification Methodology Desired
ASIC Digital Design, Architect
. Proficiency in System Verilog, UVM, SVA, and other verification techniques. Strong understanding of digital design...: Proficiency in digital design and verification methodologies. Experience with developing testbenches using System Verilog and UVM
Senior Design Engineer
documentation What we're looking for: Expert-level Verilog / SystemVerilog Strong commercial FPGA and/or ASIC design
Senior FPGA Engineer
and verification within complex hardware environments. Experience with System Verilog, and/or VHDL. Expert-level proficiency... in Verilog and deep understanding of FPGA architectures. Strong experience achieving timing closure on high-utilization FPGA
Embedded Software Engineer - Innovation Transfer
with Verilog or VHDL. Production-level Python experience, including package and project management tools such as uv, static typing
Principal Hardware Engineer, Analog & RF (UK)
firmware in C/C++ on ARM Cortex-M class microcontrollers FPGA development in Verilog or SystemVerilog, including real-time DSP
Senior IC Design Engineer
solutions Defining digital architectures and contributing to RTL development using Verilog/SystemVerilog Developing embedded... looking for Experience developing digital or mixed-signal integrated circuits Strong Verilog and/or SystemVerilog skills Embedded software
2027 Electronic Engineering Internship
such as Verilog or VHDL. You will work alongside design engineers to support pre-silicon verification. Emulation - This discipline
Senior Digital ASIC Design Engineer
digital ASIC / RTL design experience Advanced SystemVerilog or Verilog Experience through the ASIC flow to tapeout Digital
FPGA Engineer
FPGA Engineer with the following background: Strong RTL development using Verilog or SystemVerilog Experience developing
Senior FPGA Engineer
languages such as VHDL or Verilog Hands-on experience with FPGA verification, simulation, and validation processes Knowledge
FPGA Engineer
processing architectures • Experience with relevant hardware description languages such as VHDL or Verilog • An understanding
Senior FPGA Engineer
/ Verilog / SystemVerilog development ADC and LVDS data acquisition DMA and high-speed data movement AXI interfaces and PS/PL
Summer 2027 Hardware Engineer Intern
languages such as C/C++, TCL, Perl, Python, Java, Ruby Computer architecture, CPU & GPU architecture. Verilog, VHDL ASIC
Engineering Placement Intern
development using Verilog or VHDL AMD Adaptive SoC/FPGA toolchains (e.g., Vivado, Vitis, PetaLinux) AMD FPGAs and system design
Architecture Engineer - London | Digital Photonics / Deep Tech Start-Up | Architecture & RTL
simply documented. Own the implementation - You’ll contribute directly to RTL design and verification using Verilog... using Verilog, combined with an understanding of computer architecture. You might come from: Digital design / RTL
Senior Linux Kernel Engineer (Networking)
-Express Experience of linux systems Experience of digital design (EDA tools, Verilog, VHDL) ACADEMIC CREDENTIALS
Electronic Technician
or Arduino), and FPGA programming with a working knowledge of Verilog Schematic capture and PCB layout in KiCad or similar
FPGA Engineer
and highly regulated environments. Key Responsibilities: Designing and developing FPGA solutions using Xilinx, TCL, Verilog... engineering, firmware development Strong knowledge of Verilog, SystemVerilog, TCL and UVM Understanding of Xilinx, Intel (Altera