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Alpes-de-Haute-Provence - Bainbridge, North Yorkshire
Wed, 14 Oct 2026 06:13:41 GMT

Understanding of Emulation methodology: FPGA, Debug tools, RTL Simulation Additional Skills: Python, Verilog Linux Kernel boot

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Alpes-de-Haute-Provence - Bainbridge, North Yorkshire
Wed, 14 Oct 2026 05:05:10 GMT

development skills: SystemVerilog/Verilog integration and design. RTL Simulation. Debugging Systems understanding: Bus Protocols...-10 years experience Technical Experience: Essential: Verilog/SystemVerilog, Verification Methodology Desired

ASIC Digital Design, Architect

Synopsys ✓ Verified
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United Kingdom
Wed, 14 Oct 2026 03:06:36 GMT

. Proficiency in System Verilog, UVM, SVA, and other verification techniques. Strong understanding of digital design...: Proficiency in digital design and verification methodologies. Experience with developing testbenches using System Verilog and UVM

Senior Design Engineer

Spectrum IT ✓ Verified
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England
Tue, 13 Oct 2026 23:21:01 GMT

documentation What we're looking for: Expert-level Verilog / SystemVerilog Strong commercial FPGA and/or ASIC design

Senior FPGA Engineer

Oxford Quantum Circuits ✓ Verified
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England
Mon, 12 Oct 2026 01:56:20 GMT

and verification within complex hardware environments. Experience with System Verilog, and/or VHDL. Expert-level proficiency... in Verilog and deep understanding of FPGA architectures. Strong experience achieving timing closure on high-utilization FPGA

Embedded Software Engineer - Innovation Transfer

Oxford Quantum Circuits ✓ Verified
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England
Sun, 11 Oct 2026 22:32:52 GMT

with Verilog or VHDL. Production-level Python experience, including package and project management tools such as uv, static typing

Principal Hardware Engineer, Analog & RF (UK)

Mesa Quantum Systems ✓ Verified
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London
Fri, 09 Oct 2026 22:16:50 GMT

firmware in C/C++ on ARM Cortex-M class microcontrollers FPGA development in Verilog or SystemVerilog, including real-time DSP

Senior IC Design Engineer

Matchtech Group ✓ Verified
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Hampshire
Fri, 09 Oct 2026 07:31:18 GMT

solutions Defining digital architectures and contributing to RTL development using Verilog/SystemVerilog Developing embedded... looking for Experience developing digital or mixed-signal integrated circuits Strong Verilog and/or SystemVerilog skills Embedded software

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Edinburgh - Newbury, Berkshire
Thu, 08 Oct 2026 04:15:10 GMT

such as Verilog or VHDL. You will work alongside design engineers to support pre-silicon verification. Emulation - This discipline

Senior Digital ASIC Design Engineer

IC Resources ✓ Verified
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West Yorkshire
Thu, 08 Oct 2026 00:44:14 GMT

digital ASIC / RTL design experience Advanced SystemVerilog or Verilog Experience through the ASIC flow to tapeout Digital

FPGA Engineer

IC Resources ✓ Verified
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Cambridgeshire
Thu, 08 Oct 2026 00:06:39 GMT

FPGA Engineer with the following background: Strong RTL development using Verilog or SystemVerilog Experience developing

Senior FPGA Engineer

iO Associates ✓ Verified
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Newport
Wed, 07 Oct 2026 07:43:35 GMT

languages such as VHDL or Verilog Hands-on experience with FPGA verification, simulation, and validation processes Knowledge

FPGA Engineer

Redline Group ✓ Verified
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Manchester
Wed, 07 Oct 2026 05:35:40 GMT

processing architectures • Experience with relevant hardware description languages such as VHDL or Verilog • An understanding

Senior FPGA Engineer

Avanti Recruitment ✓ Verified
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Cambridge
Wed, 07 Oct 2026 01:16:52 GMT

/ Verilog / SystemVerilog development ADC and LVDS data acquisition DMA and high-speed data movement AXI interfaces and PS/PL

Summer 2027 Hardware Engineer Intern

Advanced Micro Devices ✓ Verified
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Cambridge
Wed, 07 Oct 2026 01:01:59 GMT

languages such as C/C++, TCL, Perl, Python, Java, Ruby Computer architecture, CPU & GPU architecture. Verilog, VHDL ASIC

Engineering Placement Intern

Advanced Micro Devices ✓ Verified
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Belfast
Tue, 06 Oct 2026 02:58:22 GMT

development using Verilog or VHDL AMD Adaptive SoC/FPGA toolchains (e.g., Vivado, Vitis, PetaLinux) AMD FPGAs and system design

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London
Tue, 06 Oct 2026 01:54:37 GMT

simply documented. Own the implementation - You’ll contribute directly to RTL design and verification using Verilog... using Verilog, combined with an understanding of computer architecture. You might come from: Digital design / RTL

Senior Linux Kernel Engineer (Networking)

Advanced Micro Devices ✓ Verified
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Cambridge
Mon, 05 Oct 2026 22:55:58 GMT

-Express Experience of linux systems Experience of digital design (EDA tools, Verilog, VHDL) ACADEMIC CREDENTIALS

Electronic Technician

KO2 Recruitment ✓ Verified
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Oldham, Greater Manchester
Sat, 03 Oct 2026 06:32:11 GMT

or Arduino), and FPGA programming with a working knowledge of Verilog Schematic capture and PCB layout in KiCad or similar

FPGA Engineer

Matchtech Group ✓ Verified
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England
Thu, 01 Oct 2026 03:47:16 GMT

and highly regulated environments. Key Responsibilities: Designing and developing FPGA solutions using Xilinx, TCL, Verilog... engineering, firmware development Strong knowledge of Verilog, SystemVerilog, TCL and UVM Understanding of Xilinx, Intel (Altera

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