Postdoctoral Research Associate Position in Neuromorphic Accelerators
, neuromorphic, Transformer, and/or state-space models. Experience with ASIC and/or FPGA design, hardware prototyping, and tapeout
MEMS Electronics Technologist (Hybrid)
components including microprocessors, FPGAs, or programmable logic devices Experience with ASIC development and specification
Head of Data & AI
reporting frameworks such as MiFID II, MiFIR or ASIC requirements. Experience implementing AI solutions within regulated
ASIC Digital Design Verification, Sr Staff Engineer
,-age,-military-veteran-status,-or-disability. /span /p custom_fields.CareerAreas-ASIC-Digital-Design custom_fields....SalaryRange-€94000-€141000 custom_fields.SubCategory-ASIC-Digital-Design custom_fields.EmployeeStatus-Employee custom_fields
Head of Data & AI
reporting frameworks such as MiFID II, MiFIR or ASIC requirements. Experience implementing AI solutions within regulated
Head of Data & AI
frameworks such as MiFID II, MiFIR or ASIC requirements. Experience implementing AI solutions within regulated financial
Head of Data & AI
frameworks such as MiFID II, MiFIR or ASIC requirements. Experience implementing AI solutions within regulated financial
Hardware Engineering Placement Student
with ASIC software and verification teams. The opportunity to undertake a long-term Research & Development project to increase
Senior Verification Engineer
networks, with its RTL team responsible for delivering efficient ASIC and FPGA implementations of complex communications..., working closely with RTL, architecture and wider engineering teams through to FPGA deployment and ASIC tape-out
FPGA Engineer
and ASIC development, taking designs through verification, implementation, optimisation, and integration onto FPGA platforms... complex FPGA and/or ASIC designs Strong knowledge of synthesis, timing analysis, and resource optimisation Experience
Senior Digital ASIC Design Engineer
on the development of complex ASIC technology. This is an opportunity to join a technically ambitious engineering team... and contribute across the digital ASIC development flow, from architecture and RTL design through to tapeout and silicon bring up
Project Manager
, looking for an experienced Technical Project Manager to join their team. This is a hands-on position taking ownership of complex ASIC, silicon... opportunity within the Cambridge semiconductor market. What You'll Be Doing Plan, track and manage complex ASIC, silicon
Senior Verification Engineer
Methodology) for FPGA/ASIC verification Familiarity with security features and protocols, such as CHERI, is a plus Excellent
Staff Digital IC Design Engineer
We are looking for an experienced Staff Digital IC Design Engineer to join an advanced semiconductor engineering team working on complex ASIC and mixed... and implement digital functions and blocks for complex ASIC and mixed-signal products. Contribute to digital design activities
Project Manager
design engineer in ASIC, FPGA or embedded environments (you don’t need to be an expert) Experience working with cross
Summer 2027 Hardware Engineer Intern
languages such as C/C++, TCL, Perl, Python, Java, Ruby Computer architecture, CPU & GPU architecture. Verilog, VHDL ASIC
Senior Staff RF/Analogue IC CAD Engineer
of ASIC design, verification, validation, integration, or related work experience. OR Master’s degree in Science..., Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience
Research Fellow
in either embedded systems design or FPGA or ASIC hardware design, along with demonstrable expertise in post-quantum cryptography
Architecture Engineer - London | Digital Photonics / Deep Tech Start-Up | Architecture & RTL
engineering Computer architecture FPGA development ASIC / semiconductor design Hardware acceleration Digital signal
ASIC Digital Design, Sr Staff Engineer
,-age,-military-veteran-status,-or-disability. /span /p custom_fields.CareerAreas-ASIC-Digital-Design custom_fields....SubCategory-ASIC-Digital-Design custom_fields.EmployeeStatus-Employee custom_fields.unposting_date-2027-10-05 custom_fields