Showing page 1 of 5 (Total listings: 89)
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London
Sat, 10 Oct 2026 05:35:34 GMT

, neuromorphic, Transformer, and/or state-space models. Experience with ASIC and/or FPGA design, hardware prototyping, and tapeout

MEMS Electronics Technologist (Hybrid)

Raytheon Technologies ✓ Verified
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Almondsbury, Gloucestershire - Aztec, NM
Sat, 10 Oct 2026 02:48:00 GMT

components including microprocessors, FPGAs, or programmable logic devices Experience with ASIC development and specification

Head of Data & AI

Trade Nation ✓ Verified
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London
Fri, 09 Oct 2026 06:08:14 GMT

reporting frameworks such as MiFID II, MiFIR or ASIC requirements. Experience implementing AI solutions within regulated

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United Kingdom
Fri, 09 Oct 2026 03:35:59 GMT

,-age,-military-veteran-status,-or-disability. /span /p custom_fields.CareerAreas-ASIC-Digital-Design custom_fields....SalaryRange-€94000-€141000 custom_fields.SubCategory-ASIC-Digital-Design custom_fields.EmployeeStatus-Employee custom_fields

Head of Data & AI

Trade Nation ✓ Verified
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England
Fri, 09 Oct 2026 00:07:06 GMT

reporting frameworks such as MiFID II, MiFIR or ASIC requirements. Experience implementing AI solutions within regulated

Head of Data & AI

Trade Nation ✓ Verified
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London
Thu, 08 Oct 2026 22:22:23 GMT

frameworks such as MiFID II, MiFIR or ASIC requirements. Experience implementing AI solutions within regulated financial

Head of Data & AI

Trade Nation ✓ Verified
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England
Thu, 08 Oct 2026 22:18:34 GMT

frameworks such as MiFID II, MiFIR or ASIC requirements. Experience implementing AI solutions within regulated financial

Hardware Engineering Placement Student

Sensata Technologies ✓ Verified
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Newtownabbey, Co Antrim
Thu, 08 Oct 2026 22:00:06 GMT

with ASIC software and verification teams. The opportunity to undertake a long-term Research & Development project to increase

Senior Verification Engineer

IC Resources ✓ Verified
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Hampshire
Thu, 08 Oct 2026 07:15:42 GMT

networks, with its RTL team responsible for delivering efficient ASIC and FPGA implementations of complex communications..., working closely with RTL, architecture and wider engineering teams through to FPGA deployment and ASIC tape-out

FPGA Engineer

IC Resources ✓ Verified
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Cambridgeshire
Thu, 08 Oct 2026 03:25:38 GMT

and ASIC development, taking designs through verification, implementation, optimisation, and integration onto FPGA platforms... complex FPGA and/or ASIC designs Strong knowledge of synthesis, timing analysis, and resource optimisation Experience

Senior Digital ASIC Design Engineer

IC Resources ✓ Verified
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West Yorkshire
Thu, 08 Oct 2026 02:11:39 GMT

on the development of complex ASIC technology. This is an opportunity to join a technically ambitious engineering team... and contribute across the digital ASIC development flow, from architecture and RTL design through to tapeout and silicon bring up

Project Manager

microTECH Global ✓ Verified
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United Kingdom
Wed, 07 Oct 2026 22:56:24 GMT

, looking for an experienced Technical Project Manager to join their team. This is a hands-on position taking ownership of complex ASIC, silicon... opportunity within the Cambridge semiconductor market. What You'll Be Doing Plan, track and manage complex ASIC, silicon

Senior Verification Engineer

IC Resources ✓ Verified
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United Kingdom
Wed, 07 Oct 2026 22:55:23 GMT

Methodology) for FPGA/ASIC verification Familiarity with security features and protocols, such as CHERI, is a plus Excellent

Staff Digital IC Design Engineer

MRL Consulting Group ✓ Verified
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Cambridgeshire
Wed, 07 Oct 2026 03:04:39 GMT

We are looking for an experienced Staff Digital IC Design Engineer to join an advanced semiconductor engineering team working on complex ASIC and mixed... and implement digital functions and blocks for complex ASIC and mixed-signal products. Contribute to digital design activities

Project Manager

IC Resources ✓ Verified
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Hampshire
Wed, 07 Oct 2026 01:20:02 GMT

design engineer in ASIC, FPGA or embedded environments (you don’t need to be an expert) Experience working with cross

Summer 2027 Hardware Engineer Intern

Advanced Micro Devices ✓ Verified
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Cambridge
Wed, 07 Oct 2026 00:46:47 GMT

languages such as C/C++, TCL, Perl, Python, Java, Ruby Computer architecture, CPU & GPU architecture. Verilog, VHDL ASIC

Senior Staff RF/Analogue IC CAD Engineer

European Recruitment ✓ Verified
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United Kingdom
Tue, 06 Oct 2026 06:33:43 GMT

of ASIC design, verification, validation, integration, or related work experience. OR Master’s degree in Science..., Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience

Research Fellow

Queen's University Belfast ✓ Verified
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Belfast
Tue, 06 Oct 2026 05:41:49 GMT

in either embedded systems design or FPGA or ASIC hardware design, along with demonstrable expertise in post-quantum cryptography

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London
Tue, 06 Oct 2026 04:16:12 GMT

engineering Computer architecture FPGA development ASIC / semiconductor design Hardware acceleration Digital signal

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United Kingdom
Tue, 06 Oct 2026 00:56:06 GMT

,-age,-military-veteran-status,-or-disability. /span /p custom_fields.CareerAreas-ASIC-Digital-Design custom_fields....SubCategory-ASIC-Digital-Design custom_fields.EmployeeStatus-Employee custom_fields.unposting_date-2027-10-05 custom_fields

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