Found 70 jobs on 7 pages

29 Jun
Senior Staff SOC Design Eng
Location: Pulau Pinang
Salary: N/A

FPGA. The individual should have the ability to work closely with architect to translate specifications into high-speed RTL... protocols (e.g.: PCIe, Ethernet, CPRI or JESD204B/C) is a must. Hands-on experience in FPGA RTL design, logic verification...

29 Jun
CPLD, Lead Engineer
Location: Pulau Pinang
Salary: N/A

, Ripple, Buses such as SATA/SAS/PCIe/I2C/SPI etc. Knowledge/Skills/Competencies . FPGA design processes including programming... of ModelSim SE . Synthesis tools of Synplicity Synplify . BS/EE with 5+ years of FPGA/CPLD development experience. . Solid Verilog...

29 Jun
CPLD, Lead Engineer
Location: Pulau Pinang
Salary: N/A

, Ripple, Buses such as SATA/SAS/PCIe/I2C/SPI etc. Knowledge/Skills/Competencies FPGA design processes including programming... SE Synthesis tools of Synplicity Synplify BS/EE with 5+ years of FPGA/CPLD development experience. Solid Verilog RTL and test bench...

29 Jun
DFT Engineer
Location: Pulau Pinang
Salary: N/A

, and 1st silicon debug for Company's FPGA products. Develop HMDT test module, conversion test pattern from STIL to pobj, doing...

27 Jun
CPLD, Lead Engineer
Location: Pulau Pinang
Salary: N/A

, Interrupts, DC/DC, Ripple, Buses such as SATA/SAS/PCIe/I2C/SPI etc. Knowledge/Skills/Competencies FPGA design processes... etc. Simulation tools of ModelSim SE Synthesis tools of Synplicity Synplify BS/EE with 5+ years of FPGA/CPLD development...

26 Jun
Senior Staff Design Engineer
Location: Pulau Pinang
Salary: N/A

FPGA. The individual should have the ability to work closely with architect to translate specifications into high-speed RTL... protocols (e.g.: PCIe, Ethernet, CPRI or JESD204B/C) or Peripherals (SPI, I2C or I3C) is a must. Hands-on experience in FPGA...

25 Jun
SW Dev Eng 2 - LPG
Location: Pulau Pinang
Salary: N/A

, debugging and testing from and internal and customer perspective of Lattice FPGA design software at Penang. The candidate... for the front end tools to improve customer experience in Lattice FPGA design. The candidate is expected to work closely...

25 Jun
SW Dev Eng 3
Location: Pulau Pinang
Salary: N/A

and developing Lattice FPGA software tools at Penang. The candidate will contribute to research, design and develop software tools... (Lattice IP Catalog) for Lattice FPGA Module Generator. The candidate is expected to innovate new tools and features to improve...

25 Jun
Hard-IP Staff Design Engineer
Location: Pulau Pinang
Salary: N/A

digital design engineer to build High Speed Serial Protocol Hard-IP portfolio for Lattice FPGA. The individual should have the... power and optimum logic utilization. Qualifications Good understanding in ASIC/FPGA IP or SoC development cycle...

25 Jun
FPGA Development Tools Senior Software Engineer
Location: Pulau Pinang
Salary: N/A

Gate Arrays (FPGA). Develops and optimizes compilers, flows, assemblers, models, tools, runtimes, and/or firmwares... that are closely coupled to FPGA silicon, IP, and boards, while leveraging strong knowledge of FPGA hardware, logic design, board...