Found 364 jobs on 37 pages

03 Nov
POWER Coherency Architect
Location: Bangalore, Karnataka
Salary: N/A

speed infrastructure Proficient in HDLs- VHDL must/ Verilog Experience in working with architecture/ FW/ SW teams...

01 Nov
NoC Systems Staff Engineer
Location: Bangalore, Karnataka
Salary: N/A

with SoC Design, Verilog RTL coding Understanding of multi-core ARMv8/v9 CPU architecture, coherency protocols...

01 Nov
Lead Engineer - GLS Verification
Location: Hyderabad, Telangana
Salary: N/A

and execute verification plans using System Verilog and UVM to validate complex ASIC/FPGA designs. Design and implement... Verilog/UVM based verification skills Experience with Assertion coverage-based verification methodology Experience in formal...

01 Nov
FPGA SW
Location: India
Salary: N/A

is plus Understanding of Verilog, Developing GUI using Qt is plus Excellent communication and problem-solving skills are must Good verbal...

31 Oct
Sr Staff RTL/ Integration Design Engineer
Location: Pune, Maharashtra
Salary: N/A

, algorithms, and both Verilog and System Verilog. The qualified candidate will be expert in SoC integration and associated...

31 Oct
Design Verification - Sr Staff Engineer
Location: Chennai, Tamil Nadu
Salary: N/A

of digital design and SOC architecture. · Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM... & System C · Experience in HDL such as Verilog · Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3...

31 Oct
Staff RTL/ Integration Design Engineer
Location: Pune, Maharashtra
Salary: N/A

, algorithms, and both Verilog and System Verilog. The qualified candidate will be expert in SoC integration and associated...

31 Oct
Engineer-Memory Circuit Design Verification
Location: Hyderabad, Telangana
Salary: N/A

Proficient with either SPICE and/or Verilog simulations Qualifications & Skills Experience in SystemVerilog, PLI coding...

31 Oct
Engineer-Memory Circuit Design Verification
Location: Hyderabad, Telangana
Salary: N/A

Proficient with either SPICE and/or Verilog simulations Qualifications & Skills Experience in SystemVerilog, PLI coding...

30 Oct
Wireless R&D RTL Design Verification Sr Engineer
Location: Bangalore, Karnataka
Salary: N/A

abstraction levels: Block/Core/IP/SS level. Demonstrate strong coding skills in System Verilog and UVM. Scripting languages...