Found 5 jobs on 1 pages

27 Apr
Full Chip Engineer
Location: San José
Salary: N/A

- Experience with advanced process nodes (e.g. 32nm and below).- Industry standard timing formats such as Liberty, Verilog...

27 Apr
Emulation Engineer
Location: San José
Salary: N/A

's degree in related field.- 1+ years of experience in the following:- Linux experience.- Verilog or System Verilog.- Experience...

26 Apr
Senior Memory System Verification Engineer
Location: San José
Salary: N/A

testcases, assertions and functional coverage using System Verilog.- Setup and run GLS to verify the asynchronous and multi... Verification method.- Experience in High Speed I/O Design and Mixed signal design.- Hardware description language (Verilog...

26 Apr
Fpga Memory-Io Ddr Architect
Location: San José
Salary: N/A

memory subsystems for ASIC, SOC, or FPGAs. e.g., DDR5.- Working experience in DRAM protocol.- Logic design, Verilog RTL...

25 Apr
Soc Design Engineering Transceiver Lead
Location: San José
Salary: N/A

and documentation- Close collaboration with Vendor Teams and Integration of SerDes IP- RTL development using Verilog, System Verilog...+ years of hands-on experience in all phases of ASIC development - micro-architecture definition, Verilog RTL coding, quality...