Found 32 jobs on 4 pages

01 Nov
验证工程师
Location: Shenzhen, Guangdong
Salary: N/A

(simulator, debugger, UVM, etc.) 4. Knowledge of the advanced verification methodology and techniques. i.e. System Verilog, UVM...

01 Nov
Intern FPGA Design - AI
Location: Beijing
Salary: N/A

and fixed-point wireless communication physical layer simulation. Demonstrated experience in VLSI design, VHDL/Verilog, high...

29 Oct
Intern FPGA AI Algorithm
Location: Beijing
Salary: N/A

and fixed-point wireless communication physical layer simulation. Demonstrated experience in VLSI design, VHDL/Verilog, high...

23 Oct
Lead Software Engineer
Location: Beijing
Salary: N/A

: Experience of development on large scale software Knowledge about Verilog, VHDL, SystemVerilog language Experience of circuit...

20 Oct
电子工程师
Location: Suzhou, Jiangsu
Salary: N/A

常用数据解码算法,如最大似然译码、线性/非线性检测算法等。 7.熟悉常用的高速数据接口。 8.熟练掌握Verilog或VHDL开发语言,掌握XILINX FPGA体系结构, 熟悉ModelSim,Synplify,ISE,VIVADO等工具。...

18 Oct
2025校招-FPGA设计师
Location: Guangzhou, Guangdong - Beijing
Salary: N/A

等知识,掌握VHDL/verilog/System Verilog语言,掌握Vivado/Matlab/Modelsim等工具,熟悉常用仪器仪表; 3、具有良好的沟通表达能力、学习能力、团队合作精神。 公司简介 广州...

18 Oct
2025校招-博士专项--高级数字芯片设计师
Location: Guangzhou, Guangdong
Salary: N/A

相关的芯片测试和芯片应用支持; 3、牵头/参与国家、省市等重大项目的申报、研制和验收。 任职资格 1、博士学历,通信/电子/集成电路等相关专业; 2、熟悉数字芯片设计流程,熟练掌握verilog,tcl,perl,c/c++语言,熟练使用相关工具; 3、具有...

16 Oct
VLSI Engineer
Location: Shenzhen, Guangdong
Salary: N/A

Verilog (UVM/OVM), RTL verification, languages (HDL/ HVL) - Competent to Expert Competency Levels Foundation...

16 Oct
VLSI Engineer
Location: Shenzhen, Guangdong
Salary: N/A

Verilog (UVM/OVM), RTL verification, languages (HDL/ HVL) - Competent to Expert Competency Levels Foundation...

13 Oct
Senior Power Analysis Engineer
Location: Shanghai
Salary: N/A

with performance and architecture teams to validate performance of the workloads Prototype a new architectural feature in Verilog... of concepts of energy consumption, estimation, and low power design. Familiarity with Verilog and ASIC design principles...